Readout chip for nuclear applications
OwnerTumay O. Tumerinventor
Life of this patent
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Abstract
A multi-channel readout chip is provided in which each channel has an analog section and a digital section. Each channel of the readout chip employs low noise charge sensitive amplifier inputs with self triggering output. The trigger threshold can be adjusted to provide energy discrimination. The chip has different, externally selectable, operational modes including a sparse readout mode in which only the channels which have received signals greater than a preselected threshold value are readout. The sparse readout mode results in increased data throughput, thus providing fast data acquisition capabilities.
Claims48
A data readout integrated circuit comprising a plurality of readout channels coupled to a plurality of detectors through a plurality of detecting channels, respectively, for providing a plurality of readout signals at an output, each readout channel of said plurality of said readout channels comprising:
- a means for receiving one detector signal;
- a charge sensitive amplifier coupled to said receiving means for integrating said detector signal and outputting a voltage signal;
- and
- a polarity switching circuit coupled to said charge sensitive amplifier for generating a selecting signal by selectively allowing said voltage signal to have a positive polarity or a negative polarity;
- and
- a means for outputting one of said readout signals responsive to said selecting signal from said polarity switching circuit.
The data readout integrated circuit comprising a plurality of readout channels coupled to receive detected signals from detectors through a plurality of detector channels, respectively, each integrated circuit channel comprising:
- means for receiving one of said detected signals;
- a charge sensitive amplifier coupled to said receiving means for integrating said one of said detector signals and outputting a voltage signal;
- for outputting at least one of a plurality of analog signals associated with some of said plurality of integrated circuit channels and corresponding to said integrated detector signals;
- a switching circuit coupled to said charge sensitive amplifier for generating a selecting signal by selectively allowing said detected signal to have a positive polarity or negative polarity;
- and
- a means for outputting one of said readout signals responsive to said selecting signal from said switching circuit.
A data readout integrated circuit comprising a plurality of readout channels respectively coupled to detectors through a plurality of detecting channels for providing readout signals at an output, each readout channel of said plurality of said readout channels comprising:
- a means for receiving one detector signal;
- a charge sensitive amplifier coupled to said receiving means for integrating said detector signal and outputting a voltage signal;
- a polarity switching circuit coupled to said charge sensitive amplifier for generating a selecting signal by selectively allowing said voltage signal to have a positive polarity or a negative polarity;
- and
- a shaper amplifier for providing shaped signal responsive to said switching signal;
- and
- a means for outputting one of said readout signals responsive to said shaped signal from said amplifier shaper.
Dependencies are inferred from the claim text.