Test method and device for semiconductor circuit

A test device of a semiconductor circuit comprising:

• a first semiconductor switch functioning as a pullup resistor;
• a second semiconductor switch functioning as a pulldown resistor, said first semiconductor switch and said second semiconductor switch being connected in series across a power supply and a ground in a circuit to be measured;
• means for bringing into conduction said first semiconductor switch and said second semiconductor switch at a same time;
• means for measuring an open circuit voltage at a connecting point of said first semiconductor switch and said second semiconductor switch;
• and
• means for measuring a through current flowing through said first semiconductor switch and said second semiconductor switch.

A test device of a semiconductor circuit which includes a plurality of circuits to be measured, each of said plurality of circuits to be measured comprising:

• a first semiconductor switch functioning as a pullup resistor;
• a second semiconductor switch functioning as a pulldown resistor, said first semiconductor switch and said second semiconductor switch being connected in series across a power supply and a ground in a circuit to be measured;
• means for bringing into conduction said first semiconductor switch and said second semiconductor switch at a same time;
• means for measuring an open circuit voltage at a connecting point of said first semiconductor switch and said second semiconductor switch;
• and
• means for measuring a through current flowing through said first semiconductor switch and said second semiconductor switch,
• wherein said test device further comprises means for sequentially providing each one of said plurality of circuits to be measured with a signal activating said means for bringing into conduction, and means for computing values of said pullup resistor and said pulldown resistor of each of said plurality of circuits to be measured from said open circuit voltage and said through current.

A semiconductor circuit comprising:

• a first transistor connected between a power supply and an output node;
• a second transistor connected between a ground and the output node;
• an output pad connected to the output node;
• a first selector receiving a first set of two control signals, for selectively outputting a one of the first set of two control signals to said first transistor in response to a first selection signal;
• a second selector receiving a second set of two control signals, for selectively outputting a one of the second set of two control signals to said second transistor in response to a second selection signal;
• and
• a control circuit for outputting the first selection signal and a first control signal, which comprises one of the first set of two control signals, to said first selector, and outputting the second selection signal and a second control signal, which comprises one of the second set of two control signals, to said second selector, said control circuit controlling the first and second selectors to supply the first and second control signals to said first and second transistor, respectively, said first and second transistor being brought into conduction simultaneously in response to the first and second control signals to cause a through current to flow between the power supply and the ground.

A semiconductor circuit comprising:

• a plurality of buffers each including a first transistor connected between a power supply and an output node and a second transistor connected between a ground an the output node;
• a plurality of output pads provided to correspond to said plurality of buffers, each output pad being connected to the output node for the corresponding buffer;
• and
• a control circuit for outputting control signals to said plurality of buffers, said plurality of buffers being controlled by the control signals so that the first and second transistors of a selected one of said plurality of buffers are brought into conduction simultaneously to cause a through current to flow between the power supply and the ground while a through current is prevented from flowing between the power supply through the first and second transistors of the buffers other than the selected one.