Advanced CMOS circuitry that utilizes both sides of a wafer surface for increased circuit density

A semiconductor wafer, comprising:

• a semiconductor substrate having a first side with a first plurality of active areas and a second side with a second plurality of active areas;
• a firs isolation structure positioned on the first side and laterally isolating the first plurality of active areas;
• and
• a second isolation structure positioned on the second side and laterally isolating the second plurality of active areas.

An integrated circuit, comprising:

• a base substrate having a first side and a second side opposite the first side;
• a first semiconductor layer and a first isolation structure positioned on the first side, the first isolation structure surrounding the first semiconductor layer;
• a first circuit device positioned on the first semiconductor layer;
• a second semiconductor layer and a second isolation structure positioned on the second side, the second isolation structure surrounding the second semiconductor layer;
• and
• a second circuit device positioned on the second semiconductor layer.

An integrated circuit, comprising:

• a base substrate having a first side and a second side opposite the first side, the first side having a first semiconductor layer and a first isolation structure positioned thereon wherein the first isolation structure surrounds the first semiconductor layer, the second side having a second semiconductor layer and a second isolation structure positioned thereon wherein the second isolation structure surrounds the second semiconductor layer;
• a first circuit device positioned on the first semiconductor layer;
• and
• a second circuit device positioned on the second semiconductor layer.