Thin film transistor fabrication method, active matrix substrate fabrication method, and liquid crystal display device
AssigneeSeiko Epson Corporation
InventorHideto Ishiguro
Life of this patent
Estimating the term…
Loading patent…
AssigneeSeiko Epson Corporation
InventorHideto Ishiguro
Estimating the term…
To provide a TFT fabrication method capable of forming on a large-surface area substrate with uniform film thickness and at high deposition rate of film, while being a low-temperature process, a high-quality gate insulation film having good charge behavior by forming a silicon oxide film by a thin film transistor fabrication method having a channel region connected to a source region and a drain region, and a gate electrode confronting with the channel region through a gate insulation film, wherein in the formation process of said gate insulation film using plasma chemical vapor deposition under the condition that tetraethoxysilane is used as the feed gas to provide the silicon and the distance between electrodes for generating the plasma is about 15 mm or less.
A method of fabricating a thin film transistor in which a gate electrode confronts with a channel region through a gate insulation film above a substrate, the method comprising:
Dependencies are inferred from the claim text.