Methods of forming top-gated thin film field effect transistors

A method of forming a top gated thin film effect transistor comprising:

• forming a thin film transistor layer over a substrate, the layer comprising first and second source/drain areas separated by an intervening channel region having a channel length;
• forming a conductive layer of material over the thin film transistor layer;
• removing conductive layer portions sufficient to define a pair of source/drain blocks over the thin film transistor layer, said blocks having inwardly facing sidewalls defining a spacing dimension therebetween, the channel length being less than the spacing dimension;
• forming a top gate over the substrate;
• and
• wherein the channel length is defined by a pair of spaced-apart channel region sidewalls, and wherein the removing of the conductive layer portions comprises forming only one of the blocks' sidewalls to be generally aligned with one of the channel region sidewalls.

A method of forming a top gated thin film field effect transistor comprising:

• forming a thin film transistor layer over a substrate, the layer comprising first and second source/drain areas separated by an intervening channel region having a channel length;
• forming a conductive layer of material over the thin film transistor layer;
• removing conductive layer portions sufficient to define a pair of source/drain blocks over the thin film transistor layer, said blocks having inwardly facing sidewalls defining a spacing dimension therebetween, the channel length being less than the spacing dimension;
• forming a top gate over the substrate;
• and
• wherein the forming of the top gate comprises forming the gate to overlap one of the blocks and not the other of the blocks.

A method of forming a top gated thin film field effect transistor comprising:

• forming a thin film transistor layer over a substrate, the layer comprising first and second source/drain areas separated by an intervening channel region having a channel length;
• forming a conductive layer of material over the thin film transistor layer;
• removing conductive layer portions sufficient to define a pair of source/drain blocks over the thin film transistor layer, said blocks having inwardly facing sidewalls defining a spacing dimension therebetween, the channel length being less than the spacing dimension;
• forming a top gate over the substrate;
• the channel length is defined by a pair of spaced-apart channel region sidewalls;
• the removing of the conductive layer portions comprises forming only one of the blocks' sidewalls to be generally aligned with one of the channel region sidewalls;
• and
• the forming of the top gate comprises forming the gate to overlap one of the blocks.

A method of forming a top gated thin film field effect transistor comprising:

• forming a thin film transistor layer over a substrate, the layer comprising first and second source/drain areas separated by an intervening channel region having a channel length;
• forming a conductive layer of material over the thin film transistor layer;
• removing conductive layer portions sufficient to define a pair of source/drain blocks over the thin film transistor layer, said blocks having inwardly facing sidewalls defining a spacing dimension therebetween, the channel length being less than the spacing dimension;
• forming a top gate over the substrate;
• the channel length is defined by a pair of spaced-apart channel region sidewalls;
• the removing of the conductive layer portions comprises forming one of the blocks' sidewalls to be generally aligned with one of the channel region sidewalls;
• and
• the forming of the top gate comprises forming the gate to have a pair of sidewalls one of which being generally aligned with the other of the channel region sidewalls.

A method of forming a top gated thin film field effect transistor comprising:

• forming a thin film transistor layer over a substrate, the layer comprising first and second source/drain areas separated by an intervening channel region having a channel length;
• forming a conductive layer of material over the thin film transistor layer;
• removing conductive layer portions sufficient to define a pair of source/drain blocks over the thin film transistor layer, said blocks having inwardly facing sidewalls defining a spacing dimension therebetween, the channel length being less than the spacing dimension;
• forming a top gate over the substrate;
• the channel length is defined by a pair of spaced-apart channel region sidewalls;
• the removing of the conductive layer portions comprises forming one of the blocks' sidewalls to be generally aligned with one of the channel region sidewalls;
• the forming of the top gate comprises forming the gate to have a pair of sidewalls one of which being generally aligned with the other of the channel region sidewalls;
• and
• the forming of the top gate comprises forming the gate to overlap one of the blocks.

A method of forming a top gated thin film field effect transistor comprising:

• forming a thin film transistor layer over a substrate, the layer comprising first and second source/drain areas separated by an intervening channel region;
• forming source/drain blocks over the thin film transistor layer;
• forming a gate oxide layer over the source/drain blocks;
• and
• forming a top gate within an area between the source/drain blocks and overlapping with only one of the blocks.

A method of forming a top gated thin film field effect transistor comprising:

• forming a thin film transistor layer over a substrate, the layer comprising first and second source/drain areas separated by an intervening channel region;
• forming source/drain blocks over the thin film transistor layer;
• forming a gate oxide layer over the source/drain blocks;
• forming a top gate within an area between the source/drain blocks and overlapping with one of the blocks;
• and
• wherein the forming of the top gate comprises forming the gate to have a sidewall spaced apart from and defining a gap with a nearest of the source/drain blocks.

A method of forming a top gated thin film field effect transistor comprising:

• forming a thin film transistor layer over a substrate, the layer comprising first and second source/drain areas separated by an intervening channel region;
• forming source/drain blocks over the thin film transistor layer;
• forming a gate oxide layer over the source/drain blocks;
• forming a top gate within an area between the source/drain blocks and overlapping with one of the blocks;
• and
• wherein the channel region is defined between a pair of spaced-apart channel region sidewalls, and wherein the forming of the top gate comprises forming the gate to have a sidewall spaced apart from and defining a gap with a nearest of the source/drain blocks, the gate sidewall being generally aligned with a channel region sidewall.

A method of forming a top gated thin film field effect transistor comprising:

• forming a thin film transistor layer over a substrate, the layer comprising first and second source/drain areas separated by an intervening channel region;
• forming source/drain blocks over the thin film transistor layer;
• forming a gate oxide layer over the source/drain blocks;
• forming a top gate within an area between the source/drain blocks and overlapping with one of the blocks;
• and
• wherein the channel region is defined between a pair of spaced-apart channel region sidewalls, and wherein the forming of the source/drain blocks comprises etching the source/drain blocks to have individual sidewalls, one of which being generally aligned with a channel region sidewall.

A method of forming a top gated thin film field effect transistor comprising:

• forming a thin film transistor layer over a substrate, the layer comprising first and second source/drain areas separated by an intervening channel region;
• forming source/drain blocks over the thin film transistor layer;
• forming a gate oxide layer over the source/drain blocks;
• forming a top gate within an area between the source/drain blocks and overlapping with one of the blocks;
• the channel region is defined between a pair of spaced-apart channel region sidewalls;
• the forming of the source/drain blocks comprises etching the source/drain blocks to have individual sidewalls, one of which being generally aligned with a channel region sidewall;
• and
• the forming of the top gate comprises forming the gate to have a sidewall spaced apart from and defining a gap with a nearest of the source/drain blocks.

A method of forming a top gated thin film field effect transistor comprising:

• forming a thin film transistor layer over a substrate, the layer comprising first and second source/drain areas separated by an intervening channel region;
• forming source/drain blocks over the thin film transistor layer;
• forming a gate oxide layer over the source/drain blocks;
• forming a top gate within an area between the source/drain blocks and overlapping with one of the blocks;
• the channel region is defined between a pair of spaced-apart channel region sidewalls;
• the forming of the source/drain blocks comprises etching the source/drain blocks to have individual sidewalls, one of which being generally aligned with a channel region sidewall;
• and
• the forming of the top gate comprises forming the gate to have a sidewall spaced apart from and defining a gap with a nearest of the source/drain blocks, the gate sidewall being generally aligned with the other of the channel region sidewalls.

A method of forming a top gated thin film field effect transistor comprising:

• forming a thin film transistor layer over a substrate, the layer comprising first and second source/drain areas separated by an intervening channel region;
• after forming said thin film transistor layer, forming a pair of source/drain blocks over the thin film transistor layer;
• and
• after forming said pair of source/drain blocks, forming a top gate having a pair of sidewalls, one of the sidewalls having a majority portion disposed laterally proximate one of said source/drain blocks, another of the sidewalls having a majority portion not disposed laterally proximate the other of said source/drain blocks.