Method of fabricating heterolithic microwave integrated circuits

Abstract

A process for fabricating heterolithic microwave integrated circuits. According to one exemplary embodiment, a glass substrate is fused to a silicon wafer, and the silicon wafer is etched to effect silicon pedestals. A glass layer is fused onto and about the silicon mesas and effectively polished to expose the tops of the silicon mesas. The backside glass layer is then polished to render a final thickness of the dielectric layer between the top surface and ground plane. In another exemplary embodiment, a layer of silicon may be selectively etched to form mesas that function as either pedestals or vias. A layer of glass may be fused to the silicon prior to etching. A layer of glass is fused to the silicon substrate and pedestals and planarized through standard polishing techniques. The wafer may be "flipped over" and polished in order to remove a substantial portion of the silicon or glass, depending on which is used. Thereafter, the integrated circuit is fabricated through standard techniques.

Dependencies are inferred from the claim text.