Method and apparatus for controlling data transfer between a synchronous DRAM-type memory and a system bus

A controller for a synchronous dynamic random access memory (SDRAM), comprising:

• circuitry configured to open a page of the SDRAM in response to a first read request;
• circuitry configured to keep the page of data open prior to deciding whether a second read request is for data on the page opened or on a different page;
• circuitry for deciding whether the second read request is for data on the page opened or on the different page;
• wherein chip select and column address strobe signals are used by the SDRAM controller to keep the page of data open.

A system comprising:

• a data processor;
• a synchronous dynamic random access memory (SDRAM);
• an SDRAM controller comprising:
• circuitry configured to open a page of data of the SDRAM in response to a first read request from the data processor;
• circuitry configured to keep the page of data open prior to deciding whether a second read request from the data processor is for data on the page opened or on a different page;
• wherein the SDRAM controller further comprises circuitry configured to decide whether the second read request is for data on the page opened or on the different page;
• wherein the SDRAM controller uses chip select and row address strobe signals to open a page on the SRAM, and wherein the SDRAM controller uses chip select and column address strobe signals to keep the page open.