Process for operating a machine with non-uniform memory access and cache coherency and a machine for implementing the process

A process for operating a machine constituted by a plurality of modules (10, 20, 40, 60), a given module (10) comprising a physical memory (5) constituted by at least two parts,

• a first part (5') for containing data blocks resident in the given module (10),
• a second part (15) for containing copies of data blocks resident in other modules (20, 40, 60),
• characterized in that the process comprises:
• providing the given module (10) with a first table Local Memory Directory (LMD) and a second table Remote Cache Table (RCT), each of which contains a predetermined number of lines, each line of the first table LMD (8) being intended to index a first block address resident in the first physical memory part (5') available to be shared with one or more of the other modules (20, 40, 60) and to index a second block address resident in the first physical memory part (5') for replacement following an access request from one of the other modules (20, 40, 60), each line of the second table RCT (9) being intended to reference a block address resident in one of the other modules (20, 40, 60), a copy of which is accessible at a location in the second physical memory part (15) corresponding to this line, and to reference another block address resident in one of the other modules (20, 40, 60) for replacement following an access request from the given module (10),
• operating the machine in a given operating mode,
• establishing a threshold value for said given operating mode,
• counting a number of replacements in the first table LMD (8) and/or a number of replacements in the second table RCT (9), and
• adapting the architecture of the machine so that the number of replacements in the first table or the second table is lower on average than a threshold for said given operating mode.