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US 6,148,356 AGranted
Scalable computer system
AssigneeIntel Corporation
InventorsDavid W. Archer, D. Michael Bell, Doug Moran, Steve Pawlowski
Life of this patent
Estimating the term…
Abstract
A computer system includes a host processor coupled to a host bus. A bridge controller is coupled to the host bus and to a plurality of first buses. The computer system also includes one or more bus bridges, each coupled to the bridge controller via one or more of said first buses. Each bus bridge is connected to one or more second buses. Either the first buses or the second buses are each configurable in either an independent mode in which the bus operates independently, or a combined mode in which two or more of said first buses or said second buses are combined to create a single bus.
Claims15
A computer system comprising:
- a host processor coupled to a host bus;
- a bridge controller coupled to the host bus and including a plurality of ports, at least two of said bridge controller ports each being configurable in either an independent mode in which each port operates as an independent bus interface, or a combined mode in which two or more bridge controller ports are combined to create a single bus interface having a greater bandwidth than one bus interface in independent mode;
- a bus bridge coupled to at least one of said bridge controller ports via one or more first buses, the bus bridge connected to one or more second buses;
- and wherein said bus bridge is configurable in either an independent mode in which each said second bus operates independently or in a combined mode in which two or more second buses are combined to create a single bus having a greater bandwidth than one second bus operating in independent mode;
- the bus bridge comprising:
- a first set of data queues for routing data between one of the first buses and one of the second buses, and a second set of data queues for routing data between another of the first buses and another of the second buses;
- a first controller for controlling operation of the first set of data queues;
- and
- a second controller for controlling operation of the second set of data queues;
- and
- wherein one of the first and second controllers is disabled and a remaining one of the first and second controllers controls both the first and second sets of data queues when said bus bridge is configured in the combined mode.
8 more elements
A computer system comprising:
- a host processor coupled to a host bus;
- a bridge controller coupled to the host bus and connected to a plurality of first buses, at least two of said first buses each being configurable in either an independent mode in which each first bus operates independently, or a combined mode in which two or more of said first buses are combined to create a single bus having a greater bandwidth than one first bus operating in independent mode;
- a bus bridge coupled to the bridge controller via one or more of said first buses, said bus bridge connected to one or more second buses;
- wherein each second bus is configurable in either a combined mode in which each second bus operates independently, and a combined mode in which two or more second buses are combined to create a single bus having a greater bandwidth than one second bus operating in independent mode;
- the bus bridge comprising:
- a first set of data queues for routing data between one of the first buses and one of the second buses, and a second set of data queues for routing data between another of the first buses and another of the second buses;
- a first controller for controlling operation of the first set of data queues;
- and
- a second controller for controlling operation of the second set of data queues;
- and
- wherein one of the first and second controllers is disabled and a remaining one of the first and second controllers controls both the first and second sets of data queues when said bus bridge is configured in the combined mode.
8 more elements
A computer system comprising:
- a host processor coupled to a host bus;
- a bridge controller coupled to the host bus and connected to a plurality of first buses, at least two of said first buses each being configurable in either an independent mode in which each first bus operates independently, or a combined mode in which two or more of said first buses are combined to create a single bus having a greater bandwidth than one first bus operating in independent mode;
- a bus bridge coupled to the bridge controller via one or more of said first buses, said bus bridge connected to one or more second buses;
- each said second bus is configurable in either a combined mode in which each second bus operates independently, and a combined mode in which two or more second buses are combined to create a single bus having a greater bandwidth than one second bus operating in independent mode;
- the bus bridge comprising
- a first set of data queues for routing data between one of the first buses and one of the second buses, and a second set of data queues for routing data between another of the first buses and another of the second buses;
- a first controller for controlling operation of the first set of data queues;
- and
- a second controller for controlling operation of the second set of data queues;
- and
- wherein even addressed data is routed through the first set of data queues and odd addressed data is routed through the second set of data queues when the bus bridge is configured in a combined mode.
8 more elements
Dependencies are inferred from the claim text.