US 6,148,052 A · Digital phase detector with ring oscillator capture and inverter delay calibration

Abstract

A DPD (digital phase error) circuit for measuring the phase skew between a first and a second clock signal for use in a variety of control systems and more particularly for use in DPLL (digital phase-locked loop) synchronizers. The DPD includes an ROG (ring oscillator generator) which has a string of inverter gates forming an RO (ring oscillator) and a ring counter. The ring counter operates to monitor the time elapsed from the occurrence of a reset clock signal edge by recording the number of oscillation periods of the RO. The RO and ring counter are coupled to an ROC (ring oscillator capture) unit which operates to capture the state of the RO and ring counter for every occurrence of a respective first clock signal edge and second clock signal edge so as to accurately evaluate the time elapsed since the occurrence of the preceding reset clock signal edge. These measurements are routed to a CU (control unit) where they are processed to determine the actual phase error between the first and second clock signals. For each capture effected in the ROC, a highly accurate calibration signal generated to have a fixed phase deviation from the reset clock signal is received for capturing state of the RO and ring counter to determine the average inverter propagation delay of the inverter gates forming the RO and accordingly calibrate each phase error in accordance with the proper average inverter propagation delay.

Claims19

Dependent claims

A digital phase detector for providing an indication of a phase skew relationship between a first and a second signal, the digital phase detector comprising:

an oscillating circuit having an input for receiving a reset signal and outputs on which are provided signals representing the state of the oscillating circuit;
and
a capture circuit having inputs for receiving the first and second signals, respectively, and having inputs connected to the outputs of the oscillating circuit, the capture circuit capturing the state of the oscillating circuit at the occurrence of an edge of the first and second signals for determining the phase skew relationship.

A digital phase detector for providing an indication of a phase skew relationship between a first and a second signal, the digital phase detector comprising:

an oscillating circuit;
and
a capture circuit having inputs for receiving the first and second signals, respectively, the capture circuit capturing the state of the oscillating circuit at the occurrence of an edge of the first and second signals for determining the phase skew relationship wherein the oscillating circuit is an ROG (ring oscillator generator) and comprises:
an RO (ring oscillator) having a predetermined oscillation period and producing a first digital output signal representative of the state of the RO and available for capture;
a ring counter having an input port for receiving a reset signal, a clock port coupled to the RO for monitoring the oscillation periods and an output port for producing an integer count of the oscillation periods in relation to the reset signal;
and
a ring counter buffer coupled to the ring counter for producing a second digital output signal representative of the state of the ring counter and available for capture.

4 more elements

Dependencies are inferred from the claim text.

Digital phase detector with ring oscillator capture and inverter delay calibration

Life of this patent

Digital phase detector with ring oscillator capture and inverter delay calibration

Life of this patent

Abstract

Claims19