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US 6,148,043 AGranted
Viterbi decoder and viterbi decoding method
AssigneeSony Corporation
InventorKensuke Fujimoto
Life of this patent
Estimating the term…
Abstract
In a branch metric calculating circuit, using a sample value `y` input from an A/D converter and reference levels {-1, -1/2, 1/2, 1}, branch metric calculation is performed by squaring a difference between the sample value `y` and each of the reference levels and subtracting the square of the sample value `y` from the resultant value of squaring the difference. Since actual calculation is carried out for values 2y, y-3/4, -y-3/4 and -2y in this arrangement, square operation circuits can be eliminated, thereby making it possible to simplify a configuration of a Viterbi decoder.
Claims11
A Viterbi decoder, comprising:
- calculation circuit means for calculating a plurality of branch metric values using a sample value of a reproduction signal and each of a plurality of reference levels;
- selection circuit means for selecting a particular value from sum data of said plurality of branch metric values output by said calculation circuit means and a plurality of path metric values corresponding to said plurality of branch metric values;
- metric memory means for storing the particular value selected by said selection circuit means as one of said plurality of path metric values:
- and
- path memory means for storing path data according to selection made by said selection circuit means,
- wherein said calculation circuit means calculates said plurality of branch metric values by squaring a difference between said sample value and said each of said plurality of reference levels and subtracting a square of said sample value plus a predetermined constant from the squared difference.
3 more elements
A Viterbi decoder comprising:
- calculation circuit means for calculating a plurality of branch metric values using a sample value of a reproduction signal and each of a plurality of reference levels;
- selection circuit means for selecting a particular value from sum data of said plurality of branch metric values output by said calculation circuit means and a plurality of path metric values corresponding to said plurality of branch metric values;
- metric memory means for storing the particular value selected by said selection circuit means as one of said plurality of path metric values;
- and
- path memory means for storing path data according to selection made by said selection circuit means,
- wherein if all of a plurality of values selected by said selection circuit means have a same algebraic sign, a value equal to 1/4 of a numeric value range representable by said metric memory means is added to or subtracted from each of the plurality of selected values and a resultant value of the addition or the subtraction is stored as a path metric value in said metric memory means.
3 more elements
A Viterbi decoding method, comprising:
- a calculation step of calculating a plurality of branch metric values using a sample value of a reproduction signal and each of a plurality of reference levels;
- a selection step of selecting a particular value from sum data of said plurality of branch metric values output in said calculation step and a plurality of path metric values corresponding to said plurality of branch metric values;
- a first storage step of storing the particular value selected in said selection step as one of said plurality of path metric values;
- and
- a second storage step of storing path data according to selection made by said selection circuit means,
- wherein if all of a plurality of values selected by said selection circuit means have a same algebraic sign, a value equal to 1/4 of a numeric value range representable by said metric memory means is added to or subtracted from each of the plurality of selected values and a resultant value of the addition or the subtraction is stored as said path metric value in said metric memory means.
3 more elements
A Viterbi decoding method, comprising:
- a calculation step of calculating a plurality of branch metric values using a sample value of a reproduction signal and each of a plurality of reference levels;
- a selection step of selecting a particular value from sum data of said plurality of branch metric values output in the calculation step and a plurality of path metric values corresponding to said plurality of branch metric values;
- a first storage step of storing the particular value selected in the selection step as one of said plurality of path metric values;
- and
- a second storage step of storing path data according to selection made in the selection step,
- wherein the calculation step includes calculating said plurality of branch metric values by squaring a difference between said sample value and said each of said plurality of reference levels and subtracting a square of said sample value plus a predetermined constant from the squared difference.
3 more elements
A Viterbi decoder, comprising:
- calculation circuit means for calculating a plurality of branch metric values using a sample value of a reproduction signal and each of a plurality of reference levels;
- selection circuit means for selecting a particular value from sum data of said plurality of branch metric values output by said calculation circuit means and a plurality of path metric values corresponding to said plurality of branch metric values;
- metric memory means for storing the particular value selected by said selection circuit means as one of said plurality of path metric values;
- and
- path memory means for storing path data according to selection made by said selection circuit means,
- wherein said calculation circuit means comprises:
- adder means for adding said sample value and a predetermined constant;
- and
- shifter means for shifting bits of said sample value.
6 more elements
A Viterbi decoder, comprising:
- calculation circuit means for calculating a plurality of branch metric values using a sample value of a reproduction signal and each of a plurality of reference levels;
- selection circuit means for selecting a particular value from sum data of said plurality of branch metric values output by said calculation circuit means and a plurality of path metric values corresponding to said plurality of branch metric values;
- metric memory means for storing the particular value selected by said selection circuit means as one of said plurality of path metric values;
- and
- path memory means for storing path data according to selection made by said selection circuit means,
- wherein said sample value of said reproduction signal is represented in five bits and said selection circuit means and metric memory means have an eight-bit structure.
3 more elements
Dependencies are inferred from the claim text.