On-chip word line voltage generation for DRAM embedded in logic process
AssigneeMonolithic System Technology, Inc.
InventorsWingyu Leung, Fu-Chieh Hsu
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AssigneeMonolithic System Technology, Inc.
InventorsWingyu Leung, Fu-Chieh Hsu
Estimating the term…
A memory system that includes a dynamic random access memory (DRAM) cell, a word line, and a CMOS word line driver fabricated using a conventional logic process. The word line driver is controlled to provide a positive boosted voltage and a negative boosted voltage to the word line, thereby controlling access to the DRAM cell. A positive boosted voltage generator is provided to generate the positive boosted voltage, such that this voltage is greater than V.sub.dd but less than V.sub.dd plus the absolute value of a transistor threshold voltage V.sub.t. Similarly, a negative boosted voltage generator is provided to generate a negative boosted voltage, such that this voltage is less than V.sub.SS by an amount less than V.sub.t. A coupling circuit is provided between the word line driver and one of the positive or negative boosted voltage generators. The coupling circuit couples the word line driver to the selected one of the positive or negative boosted word line generators only when the word line is activated. The positive boosted voltage generator includes a charge pump control circuit that limits the positive boosted voltage to a voltage less than V.sub.dd plus V.sub.t. Similarly, the negative boosted voltage generator includes a charge pump control circuit that limits the negative boosted voltage to a voltage greater than V.sub.SS minus V.sub.t.
A memory system that operates in response to a positive supply voltage and a ground supply voltage, the memory system comprising:
The memory system of claim 5, wherein the negative boosted voltage is less than the ground supply voltage and greater than the ground supply voltage minus the absolute value of one transistor threshold voltage.
A memory system that operates in response to a positive supply voltage and a ground supply voltage, the memory system comprising:
A memory system that operates in response to a positive supply voltage and a ground supply voltage, the memory system comprising:
A memory system that operates in response to a positive supply voltage and a ground supply voltage, the memory system comprising:
A memory system that operates in response to a positive supply voltage and a ground supply voltage, the memory system comprising:
A memory system that operates in response to a positive supply voltage and a ground supply voltage, the memory system comprising:
A method of driving a word line coupled to a dynamic random access memory (DRAM) cell, the method comprising the steps of:
A method of driving a word line coupled to a dynamic random access memory (DRAM) cell, the method comprising the steps of:
Dependencies are inferred from the claim text.