Method and system for saving overhead program time in a memory device

A method of reducing programming time in a memory device, comprising the steps of:

• generating a wordline programming voltage with a wordline voltage generation circuit;
• generating a bitline enabling voltage with a bitline voltage generation circuit;
• directing said wordline programming voltage and said bitline enabling voltage to a comparator circuit;
• and
• programming at least one cell in said memory device when said comparator circuit senses that said wordline programming voltage and said bitline enabling voltage reach a predetermined voltage level.

A memory device with reduced overhead programming time for at least one cell in a memory sector, comprising:

• a state machine for controlling said memory device;
• a wordline voltage generation circuit and a bitline voltage generation circuit electrically connected with said state machine, wherein said wordline voltage generation circuit generates a wordline programming voltage and said bitline voltage generation circuit generates a bitline enabling voltage;
• a comparator circuit electrically connected with said state machine, said wordline voltage generation circuit and said bitline voltage generation circuit, wherein said comparator circuit compares said wordline programming voltage with said bitline enabling voltage and generates a comparator output signal that is directed to said state machine once a predetermined voltage level is reached;
• a wordline decoder circuit electrically connected with said state machine, said wordline voltage generation circuit and said memory sector for directing said wordline programming voltage to said cell in said memory sector during programming;
• and
• a bitline decoder circuit electrically connected with said state machine, said bitline voltage generation circuit and said memory sector for gating a bitline programming voltage to said cell in said memory sector during programming.