Back to results
US 6,147,667 AGranted
Semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Jun Koyama, Hisashi Ohtani
Life of this patent
Estimating the term…
Abstract
A systemized active matrix display in which a pixel matrix circuit, a driver circuit and a logic circuit are mounted on the same substrate, is formed. A TFT of the present invention has such characteristics as to be able to operate in a wide driving frequency range of 0.05 to 2 GHz, and by designing a channel length and a film thickness of a gate insulating film of the TFT according to characteristics required by circuits, it is possible to form a high frequency driving circuit and a low frequency driving circuit on the same substrate.
Claims31
An active matrix display comprising:
- a pixel matrix circuit including at least a plurality of source lines, a plurality of gate lines, and a plurality of TFTS;
- a driver circuit including at least a source line driver circuit for driving the source lines and a gate line driver circuit for driving the gate lines;
- and
- a frequency divider circuit operationally connected to the driver circuit,
- wherein the pixel matrix circuit, the driver circuit and the logic circuit are disposed on the same substrate,
- wherein the pixel matrix circuit, the driver circuit, and the logic circuit are constituted by a plurality of TFTs each made of a crystalline silicon thin film, and
- wherein one of the TFTs which constitute said frequency divider circuit is operated at a frequency of 0.1 to 0.5 GHz, has a channel length not lower than 0.5 .mu.m, and has a gate insulating film having a thickness of not larger than 600 .ANG..
4 more elements
A semiconductor device comprising:
- a substrate having an insulating surface;
- and
- a circuit operated at a frequency within a range from 0.1 to 0.5 GHz, formed over said substrate, said circuit comprising at least one thin film transistor, wherein said thin film transistor comprises a crystalline semiconductor film including a channel region therein, a gate insulating film adjacent to said crystalline semiconductor film and a gate electrode adjacent to said gate insulating film,
- wherein a thickness of said gate insulating film is not larger than 600 .ANG. and a channel length of said thin film transistor is not smaller than 0.5 .mu.m, and a subthreshold coefficient of the thin film transistor is from 60 to 100 mV/decade.
1 more element
A semiconductor device comprising:
- a substrate having an insulating surface;
- and
- a circuit formed over said substrate operated at a frequency of 0.2 GHz or higher, said circuit comprising at least one thin film transistor, wherein said thin film transistor comprises a crystalline semiconductor film including a channel region therein, a gate insulating film adjacent to said crystalline semiconductor film and a gate electrode adjacent to said gate insulating film,
- wherein a thickness of said gate insulating film is not larger than 400 .ANG. and a channel length of said thin film transistor is not smaller than 0.1 .mu.m, and a subthreshold coefficient of the thin film transistor is from 60 to 100 mV/decade.
1 more element
A semiconductor device according to clam 13 wherein said channel length is within a range of 0.1 to 0.5 .mu.m.
A semiconductor device comprising:
- a substrate having an insulating surface;
- and
- a circuit operated at a frequency of at least 25 MHz, formed over said substrate, said circuit comprising at least one thin film transistor, wherein said thin film transistor comprises a crystalline semiconductor film including a channel region therein, a gate insulating film adjacent to said crystalline semiconductor film and a gate electrode adjacent to said gate insulating film,
- wherein a thickness of said gate insulating film is not smaller than 1000 .ANG. and a channel length of said thin film transistor is not smaller than 1.5 .mu.m, and a subthreshold coefficient of the thin film transistor is from 60 to 100 mV/decade.
1 more element
A semiconductor device comprising:
- a substrate having an insulating surface;
- a first circuit comprising a first thin film transistor and driven at a frequency within a range from 0.1 to 0.5 GHz, formed over said substrate, wherein said first thin film transistor comprises a first crystalline semiconductor film including a channel region therein, a first gate insulating film adjacent to said crystalline semiconductor film and a first gate electrode adjacent to said gate insulating film, and wherein a thickness of said first gate insulating film is not larger than 600 .ANG. and a channel length of said first thin film transistor is not smaller than 0.5 .mu.m, and a subthreshold coefficient of the first thin film transistor is from 60 to 100 mV/decade;
- and
- a second circuit operationally connected to said first circuit, said second circuit including a second thin film transistor which comprises a second crystalline semiconductor film, a second gate insulating film adjacent to the second crystalline semiconductor film and a second gate electrode adjacent to said second gate insulating film, wherein said second circuit is driven at a lower frequency than said first circuit,
- wherein a thickness of said second gate insulating film is not smaller than 1000 .ANG. and a channel length of said second thin film transistor is not smaller than 1.5 .mu.m, and a subthreshold coefficient of the second thin film transistor is from 60 to 100 mV/decade.
2 more elements
Dependencies are inferred from the claim text.