Input sampling structure for delta-sigma modulator

An analog-to-digital converter (ADC) comprising:

• a digital filter;
• a delta-sigma modulator coupled to the digital filter, the delta-sigma modulator comprising:
• a main input sampling structure comprising:
• an integrator having a positive input terminal and a negative input terminal;
• a first capacitor;
• and
• a first plurality of switches for selectively connecting the first capacitor to a common mode voltage, the negative input terminal, a first input signal line, a first reference line, and a second reference line;
• and
• a first replica input sampling structure coupled to the main input sampling structure, the first replica input sampling structure comprising:
• a first buffer connected to the first input signal line, the first buffer reducing the signal dependent current from the first input signal thereby reducing gain error;
• a second capacitor;
• and
• a second plurality of switches for selectively connecting the second capacitor to the common mode voltage, the first buffer, and the first and second reference lines such that a signal-dependent current that is drawn from the reference signal lines is cancelled in the main input sampler.

A method for reducing distortion and gain errors in an input sampling circuit having a main input sampling structure comprising an integrator having a positive input terminal and a negative input terminal, a first capacitor, and a first plurality of switches for selectively connecting the first capacitor to a common mode voltage, the negative input terminal, a first input signal line, a first reference line, and a second reference line, the method comprising:

• coupling a first replica input sampling structure to the main input sampling structure, the first replica input sampling structure comprising a first buffer, a second capacitor, and a second plurality of switches for selectively connecting the second capacitor to the common mode voltage, the first buffer, and the first and second reference lines;
• buffering the first input signal line using the first buffer to reduce signal dependent current from the first input signal line;
• and
• controlling connections of the first and second reference signal lines to the second capacitor in the first replica input sampling structure such that a signal-dependent current that is drawn from the reference signal lines is cancelled in the main input sampler.