Method of invoking a power-down mode on an integrated circuit by monitoring a normally changing input signal

An integrated circuit having a plurality of pins, to at least one of which a functional input signal is applied, and to another of which a normally repeating signal is applied, normal operation of the circuit being implemented in the presence of said normally repeating signal, and a reduced power consumption mode of operation being implemented by suspension of said normally repeating signal,

• wherein,
• (1) said reduced power consumption mode of operation is terminated by resumption of said normally repeating signal,
• (2) said another of said plurality of pins is a clock pin of the integrated circuit, and
• (3) said normally repeating signal comprises a clock signal applied to said clock pin.

An integrated circuit comprising:

• (a) means responsive to a signal applied to a first input of the integrated circuit to effect a required circuit operation,
• (b) means responsive to a normally changing signal applied to a second input of the integrated circuit to enable implementation of normal operation of the circuit, and
• (c) means responsive to suspension of said normally changing signal to enable implementation of a reduced power consumption mode of operation of the circuit,
• wherein
• (i) said means responsive to suspension of said normally changing signal is further responsive to resumption of said normally changing signal to terminate implementation of said reduced power consumption mode of operation,
• (ii) said second input of the integrated circuit is a clock pin, and
• (iii) said normally changing signal comprises a clock signal applied to said clock pin.

A method of implementing a reduced power consumption mode of operation of an integrated circuit having a plurality of pins, to at least one of which a functional input signal is applied and to another of which a normally repeating signal is applied, the method comprising the steps of:

• (a) monitoring the presence of said normally repeating signal at said another of said plurality of pins,
• (b) implementing normal operation of the circuit in the presence of said normally repeating signal,
• (c) implementing a reduced power consumption mode of operation of the circuit in the absence of said normally repeating signal, and
• (d) terminating the implementation of said reduced power consumption mode of operation on resumption of said normally repeating signal.