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US 6,147,404 AGranted
Dual barrier and conductor deposition in a dual damascene process for semiconductors
AssigneeAdvanced Micro Devices, Inc.
InventorsShekhar Pramanick, Dirk Brown, John A. Iacoponi
Life of this patent
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Abstract
An integrated circuit and a method for manufacturing therefor is provided in which a partial dual damascene deposition is performed to place a barrier, seed, and conductive layer in most of a via between two interconnect channels and then capping the via with a further barrier, seed, conductive layer to prevent electromigration between an interconnect channel and the via.
Claims10
An integrated circuit, comprising:
- a semiconductor device;
- a first dielectric layer formed over said semiconductor device;
- a conductive material disposed in said first dielectric layer in contact with said semiconductor device;
- a second dielectric layer disposed over said first dielectric layer;
- a barrier layer defining a via in said second dielectric layer, said barrier layer in contact with said conductive material;
- a seed layer lining said barrier layer;
- a second conductive material over said seed layer in said via and substantially filling said via;
- a second barrier layer over said second conductive material, said barrier layer defining a channel in said second dielectric layer;
- a second seed layer lining said second barrier layer;
- and
- a third conductive material over said second seed layer and filling said channel in said second dielectric layer.
8 more elements
An integrated circuit, comprising:
- a semiconductor device;
- a first dielectric layer formed over said semiconductor device;
- a conductive material disposed in said first dielectric layer in contact with said semiconductor device;
- a via dielectric layer disposed over said first dielectric layer, said via dielectric layer having a via opening provided therein and open to said conductive material;
- a second dielectric layer formed over said via dielectric layer, said second dielectric layer having an opening provided therein and open to said via opening;
- a barrier layer lining said via opening and said opening in said second dielectric layer, said barrier layer in contact with said conductive material;
- a seed layer lining said barrier layer;
- a second conductive material over said seed layer in said via opening substantially filling said via opening;
- a second barrier layer over said second conductive material;
- a second seed layer lining said second barrier layer;
- and
- a third conductive material over said second seed layer and filling said opening in said second dielectric layer.
9 more elements
Dependencies are inferred from the claim text.