Method of manufacturing semiconductor integrated circuit device

A method of manufacturing a semiconductor integrated circuit device, comprising the steps of:

• (a) forming a first wiring pattern over a patterned major surface of a wafer;
• (b) forming a first insulating film over the patterned major surface where the first wiring pattern has been formed;
• (c) planarizing the patterned major surface where the first wiring pattern and the first insulating film have been formed, by relatively displacing the wafer with respect to a polishing plane in a plane parallel with the patterned major surface, while pressing the patterned major surface of the wafer against the polishing plane by exerting both static gas pressure through a diaphragm and mechanical pressure through a pressure plate disposed over the diaphragm, to an opposite major surface of the wafer;
• (d) forming through-holes in the planarized first insulating film;
• and
• (e) forming a second wiring pattern over the patterned major surface where the through-holes have been formed.

A method of manufacturing a semiconductor integrated circuit device, comprising the steps of:

• (a) forming a first insulating film over a patterned major surface of a wafer;
• (b) forming a first pattern of the first insulating film by selectively etching the first insulating film so as to form recess portions in the first insulating film;
• (c) forming a first conductive film over the patterned major surface where the first insulating has been patterned;
• and
• (d) planarizing the patterned major surface where the first conductive film and the first pattern have been formed to the extent that the first conductive film remains in the recess portions, by relatively displacing the wafer with respect to a polishing plane in a plane parallel with the patterned major surface, while pressing the patterned major surface of the wafer against the polishing plane by exerting both static gas pressure through a diaphragm and mechanical pressure through a pressure plate disposed over the diaphragm, to an opposite major surface of the water.

A method of manufacturing a semiconductor integrated circuit device, comprising the steps of:

• (a) forming a first wiring pattern over a patterned major surface of a wafer;
• (b) forming a first insulating film over the patterned major surface where the first wiring pattern has been formed;
• (c) planarizing the patterned major surface where the first wiring pattern and the first insulating film have been formed, by relatively displacing the wafer with respect to a polishing plane in a plane parallel with the patterned major surface, while pressing the patterned major surface of the wafer against the polishing plane by exerting static gas pressure through a diaphragm to an opposite major surface of the wafer, with the diaphragm macroscopically contacting a pressure plate disposed over the diaphragm and to which pressure plate mechanical pressure is applied;
• (d) forming through-holes in the planarized first insulating film;
• and
• (e) forming a second wiring pattern over the patterned major surface where the through-holes have been formed.

A method of manufacturing a semiconductor integrated circuit device, comprising the steps of:

• (a) forming a first insulating film over a patterned major surface of a wafer;
• (b) forming a first pattern of the first insulating film by selectively etching the first insulating film so as to form recess portions in the first insulating film;
• (c) forming a first conductive film over the patterned major surface where the first insulating film has been patterned;
• and
• (d) planarizing the patterned major surface where the first conductive film and the first pattern have been formed to the extent that the first conductive film remains in the recess portions, by relatively displacing the wafer with respect to a polishing plane in a plane parallel with the patterned major surface, while pressing the patterned major surface of the wafer against the polishing plane by exerting static gas pressure through a diaphragm to an opposite major surface of the wafer, with the diaphragm macroscopically contacting a pressure plate disprosed over the diaphragm and to which pressure plate mechanical pressure is applied.