Low capacitance interconnection
AssigneeAdvanced Micro Devices, Inc.
InventorDonald L. Wollesen
Life of this patent
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Abstract
A semiconductor device having reduced parasitic capacitance and, consequentially increased integrated circuit speed, is achieved by removing sections of dielectric interlayers which do not support conductive patterns, as by anisotropic etching, to form air gaps which can remain or are filled in with a dielectric material having a low dielectric constant. In another embodiment, a conformal dielectric coating is deposited, having a low dielectric constant.
Claims25
A method of manufacturing a semiconductor device, which method comprises sequentially:
- depositing a plurality of dielectric and conductive layers sequentially formed on one another above a semiconductor substrate wherein each dielectric layer comprises a first dielectric material and each conductive layer comprises at least one conductive pattern;
- removing sections of each dielectric layer leaving only a portion of the first dielectric material substantially under each conductive pattern of the conductive layer thereon;
- and
- depositing a first conformal dielectric coating thereon,
- wherein each dielectric layer comprises air spaces between and adjoining each portion of the first dielectric material having the first conformal dielectric coating thereon and each conductive level comprises a plurality of conductive patterns separated by air spaces.
A method of manufacturing a semiconductor device, the method comprising sequentially:
- depositing a plurality of dielectric and conductive layers sequentially formed on one another above a semiconductor substrate, wherein each dielectric layer comprises a first dielectric material and each conductive layer comprises at least one conductive pattern;
- removing sections of each dielectric layer leaving only a portion of the first dielectric material substantially under each conductive pattern of the conductive layer thereon;
- depositing a second dielectric material in each dielectric layer between and adjoining the remaining portions of the first dielectric material;
- wherein the second dielectric material has a dielectric constant less than the dielectric constant of the first dielectric material and
- depositing a first conformal dielectric coating.
A method of manufacturing a semiconductor device, which method comprises sequentially:
- depositing a plurality of dielectric and conductive layers sequentially formed on one another above a semiconductor substrate wherein each dielectric layer comprises a first dielectric material and each conductive layer comprises at least one conductive pattern;
- removing sections of each dielectric layer leaving only a portion of the first dielectric material substantially under each conductive pattern of the conductive layer thereon;
- depositing a first conformal dielectric coating thereon;
- and
- depositing a second conformal dielectric coating on the first conformal dielectric coating;
- wherein the dielectric constant of the first conformal dielectric coating is less than the dielectric constant of the second conformal dielectric coating.
A method of manufacturing a semiconductor device, the method comprising sequentially:
- depositing a plurality of dielectric and conductive layers sequentially formed on one another above a semiconductor substrate, wherein each dielectric layer comprises a first dielectric material and each conductive layer comprises at least one conductive pattern;
- removing sections of each dielectric layer leaving only a portion of the first dielectric material substantially under each conductive pattern of the conductive layer thereon;
- depositing a second dielectric material in each dielectric layer between and adjoining the remaining portions of the first dielectric material;
- wherein the second dielectric material has a dielectric constant less than the dielectric constant of the first dielectric material;
- and
- depositing a first conformal dielectric coating;
- and depositing a second conformal dielectric coating thereon;
- wherein the dielectric constant of the first conformal dielectric coating is less than the dielectric constant of the second conformal dielectric coating.
Dependencies are inferred from the claim text.