Method of manufacturing a semiconductor memory device

A method of manufacturing a semiconductor memory device, comprising the steps of:

• preparing a semiconductor substrate having a source/drain region formed in its surface;
• forming a non-doped silicon oxide film on said semiconductor substrate;
• forming a first doped silicon oxide film containing phosphorus on said non-doped silicon oxide film;
• forming a contact hole in said first doped silicon oxide film and said non-doped silicon oxide film, penetrating these films and exposing a portion of said source/drain region;
• forming a second doped silicon oxide film containing phosphorus on said semiconductor substrate to cover an inner side surface of said contact hole;
• performing an anisotropical etching on said second doped silicon oxide film such that a surface of said source/drain region is exposed to form a sidewall spacer formed of doped silicon oxide film having a cylindrical shape at the inner side surface of said contact hole;
• forming a first conductive film buried in said contact hole and extending horizontally on said semiconductor substrate;
• patterning said first conductive film to form a lower electrode of a capacitor having an axis portion extending perpendicularly and a horizontal portion extending horizontally;
• performing a gas phase hydrogen fluoride treatment on the surface of said semiconductor substrate to remove said first doped silicon oxide film and said sidewall spacer formed of doped silicon oxide film, thereby exposing an outer surface of the axis portion of said lower electrode as well as upper and lower surfaces of the horizontal portion of said lower electrode;
• covering an outer surface of said lower electrode including the outer surface the axis portion of said lower electrode and upper and lower surfaces of said lower electrode with a capacitor insulating film;
• and
• forming an upper electrode of the capacitor above said semiconductor substrate to cover the outer surface of the axis portion of said lower electrode and the outer surface of the horizontal portion of said lower electrode including its upper and lower surfaces with said capacitor insulating film therebetween.