US 6,145,069 A · Parallel decompression and compression system and method for improving storage density and access speed for non-volatile memory and embedded memory devices

Abstract

A flash memory controller and/or embedded memory controller including MemoryF/X Technology that uses data compression and decompression for improved system cost and performance. The Compression Enhanced Flash Memory Controller (CEFMC) of the present invention preferably uses parallel lossless compression and decompression engines embedded into the flash memory controller unit for improved memory density and data bandwidth. In addition, the invention includes a Compression Enhanced Memory Controller (CEMC) where the parallel compression and decompression engines are introduced into the memory controller of the microprocessor unit. The Compression Enhanced Memory Controller (CEMC) invention improves system wide memory density and data bandwidth. The disclosure also indicates preferred methods for specific applications such as usage of the invention for solid-state disks, embedded memory and Systems on Chip (SOC) environments. The disclosure also indicates a novel memory control method for the execute in place (XIP) architectural model. The integrated parallel data compression and decompression capabilities of the CEFMC and CEMC inventions remove system bottle-necks and increase performance matching the data access speeds of the memory subsystem to that of the microprocessor. Thus, the invention allows lower cost systems due to smaller data storage, reduced bandwidth requirements, reduced power and noise.

Claims39

Dependent claims

A method for managing solid state memory in a system including a solid state memory and a solid state memory controller coupled to the solid state memory, wherein the solid state memory controller includes a decompression engine, the method comprising:

storing compressed data on the solid state memory;
a device initiating a read of requested data from the solid state memory, wherein the requested data comprises compressed requested data stored on the solid state memory in a compressed format;
the solid state memory controller reading the compressed requested data from the solid state memory;
the solid state memory controller decompressing the compressed requested data to produce uncompressed requested data using parallel decompression, wherein said decompressing comprises:
examining a plurality of codes from the compressed requested data in parallel in a current decompression cycle, wherein each of the plurality of codes describes one or more symbols in the uncompressed requested data;
generating a plurality of selects in parallel in response to said examining the plurality of codes in parallel, wherein each of the plurality of selects points to a symbol in a combined history window;
and
generating the uncompressed requested data comprising the plurality of symbols using the plurality of selects;
and
the solid state memory controller providing the uncompressed requested data to the device.

7 more elements

Dependencies are inferred from the claim text.

Parallel decompression and compression system and method for improving storage density and access speed for non-volatile memory and embedded memory devices

Life of this patent

Parallel decompression and compression system and method for improving storage density and access speed for non-volatile memory and embedded memory devices

Life of this patent

Abstract

Claims39