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US 6,144,466 AGranted
Electronic circuit apparatus
AssigneeCanon Kabushiki Kaisha
InventorsHidemasa Mizutani, Mineto Yagyu, Noriyuki Kaifu, Toshihiro Saika
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AssigneeCanon Kabushiki Kaisha
InventorsHidemasa Mizutani, Mineto Yagyu, Noriyuki Kaifu, Toshihiro Saika
Estimating the term…
An electronic circuit apparatus comprises an array of M.times.N functional elements, M.times.N switching elements provided in a one-to-one correspondence with the M.times.N functional elements, a shift register having M output lines, and a selector having N select lines. M control lines are commonly connected in units of N elements of the M.times.N switching elements. The M control lines are connected to the M output lines of said shift register. N input and/or output lines are commonly connected in units of M elements of the M.times.N switching elements. The N input and/or output lines are connected to the N select lines of the selector. Transistors constituting the shift register are thin-film transistors. And, transistors constituting the selector are transistors each having an active region consisting of a single-crystal semiconductor.
An electronic circuit apparatus characterized in that a gate electrode of a first transistor is used as an input terminal, a first main electrode of said first transistor is connected to a power source or said input terminal, a second main electrode of said first transistor is connected to a gate electrode of a second transistor, a first main electrode of said second transistor is used as an output terminal, a sync pulse is applied to a second main electrode of said second transistor, a plurality of reset transistors are connected to the gate electrode of said second transistor, and reset pulses having different timings are applied to gate electrodes of said plurality of reset transistors.
An electronic circuit apparatus characterized in that a gate electrode of a first transistor is used as an input terminal, a first main electrode of said first transistor is connected to a power source or said input terminal, a second main electrode of said first transistor is connected to a gate electrode of a second transistor, a first main electrode of said second transistor is used as an output terminal, a sync pulse is applied to a second main electrode of said second transistor, a reset transistor is connected to the gate electrode of said second transistor, the sync pulse is applied to a gate electrode of said reset transistor through a capacitive element, and a voltage higher than a power source voltage is applied to the gate electrode of said reset transistor.
Dependencies are inferred from the claim text.