Synchronization signal detection and phase estimation apparatus and method

The method of detecting a segment sync sequence within an input signal sequence, the method comprising the step of:

• filtering the input signal sequence and providing a filtered signal indicative thereof;
• computing the difference between said filtered signal and a constant value and providing a difference signal value indicative thereof;
• computing an absolute value of the difference signal value and providing an absolute value indicative thereof;
• summing said absolute value with an associated value stored in a memory device to provide a summed value, and storing said summed value in a memory device;
• and
• comparing a plurality of said summed values to identify the smallest said absolute value which is indicative of the location of the segment sync sequence in the input signal sequence.

A method of detecting a synchronization signal sequence that separates data fields within an incoming data stream to accurately receive the data within the incoming digitized data stream, the method comprising the steps of:

• filtering the incoming digitized data stream to provide a filtered data stream comprising a plurality of sampled values;
• computing a difference between each of said plurality of sampled values and a constant value and providing a plurality of difference signals indicative thereof;
• computing the absolute value of each of said plurality of difference signal values to provide absolute value difference signal values indicative thereof;
• summing each of said absolute value differences signals with an associated prior absolute value difference signal and storing the resultant summed signal value;
• and
• comparing each of said resultant summed signal values to identify the smallest resultant summed signal value indicative of the location of the segment synchronization sequence in the incoming data stream.

A synchronization signal detector which receives an input signal that includes a segment sync sequence, the detector comprising:

• means for processing the input signal to provide a processed signal such that the variance of said processed signal in the temporal period associated with the segment sync sequence is substantially reduced;
• a memory device;
• means for computing the difference between said processed signal and a constant value and providing a difference value indicative thereof, for computing the absolute value of the difference, for summing said absolute value with an associated value stored in said memory device and providing a summed signal value indicative of the sum, and for storing said summed signal value in said memory device;
• and
• means for determining the smallest summed signal value, which is indicative of the location of the segment sync sequence in the input signal stream.