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US 6,144,392 AGranted
Method and apparatus for formatting a texture in a frame buffer
AssigneeATI Technologies, Inc.
InventorPhilip J. Rogers
Life of this patent
Estimating the term…
Abstract
A method for formatting a texture in a frame buffer is accomplished by receiving a lock signal from a processor, where the lock signal is associated with the texture. A pointer to a location in the frame buffer is provided in response to the lock signal, whereupon the processor stores the texture in the frame buffer at the specified location. An unlock signal is then received from the processor, indicating that the texture has been stored. The texture is then copied from the frame buffer to a memory based on a tiling algorithm to produce a tiled version of the texture in the memory. The tiled version is then copied from the memory back to the frame buffer at the specified location.
Claims32
A method for formatting a texture in a frame buffer, the method comprising:
- a) receiving a first lock signal from a processor, wherein the lock signal pertains to the texture;
- b) providing a first pointer to the processor in response to the first lock signal, wherein the first pointer corresponds to a first location in the frame buffer, and wherein the processor stores the texture in the frame buffer at the first location based on the first pointer;
- c) receiving a first unlock signal from the processor, wherein the first unlock signal indicates that the processor is finished storing the texture;
- d) copying the texture from the frame buffer to a memory based on a tiling algorithm to produce a tiled texture in the memory;
- and
- e) copying the tiled texture from the memory to the frame buffer.
3 more elements
A method for formatting a block of image data, the method comprising:
- receiving a first lock signal from a processor;
- providing a first pointer to the processor in response to the first lock signal, wherein the first pointer corresponds to a first location in memory, and wherein the processor stores the block of image data at the first location;
- receiving a first unlock signal from the processor, wherein the unlock signal indicates that the processor has stored the block of image data;
- and
- copying the block of image data from the memory to a frame buffer based on a tiling algorithm to produce a tiled block of image data in the frame buffer.
2 more elements
A method for tiling a block of image data, the method comprising:
- receiving a first lock signal;
- providing a location in response to the first lock signal, wherein the location is used to store the block of image data in a first memory;
- receiving a first unlock signal, wherein the unlock signal indicates that the block of image data is stored in the first memory;
- and
- tiling the block of image data in response to the unlock signal.
2 more elements
A method of formatting an untiled block of image data, the method comprising:
- copying successive portions of the untiled block of image data from a first memory to a second memory based on an interleaving technique to produce a tiled block of image data in the second memory, wherein copying reads the successive portions of the untiled block of image data and writes the successive portions at interleaved locations in the second memory, wherein the interleaved locations are based on a tiling alogorithm;
- and
- copying the tiled block of image data from the second memory to the first memory.
A method for maintaining a block of image data for display, the method comprising:
- receiving a first lock signal from a processor;
- providing the processor with a pointer to a storage location in response the lock signal;
- receiving a first unlock signal from the processor, wherein the first unlock signal indicates that the processor has stored the block of image data at the storage location;
- reformatting the block of image data to produce a reformatted block of image data;
- receiving a second lock signal from the processor, wherein the second lock signal indicates that the processor wishes to modify the block of image data;
- restoring the block of image data based on the reformatted block of image data;
- and
- providing a signal to the processor indicating that the block of image data is ready for modification.
5 more elements
A video graphics processing system, comprising:
- a frame buffer storing at least image data, wherein at least a portion of the image data is in a tiled format;
- a cache operably coupled to the frame buffer, wherein the cache stores portions of the image data;
- a graphics processor operably coupled to the frame buffer and the cache, wherein the graphics processor reads image data from the frame buffer and the cache and constructs a derived image for display based on the image data;
- a processor operably coupled to the frame buffer and the graphics processor;
- and
- a main memory operably coupled to the processor, the graphics processor, and the frame buffer, wherein the main memory stores an untiled set of image data and a first set of instructions, wherein when executed the first set of instructions cause the processor to:
- read successive portions of the untiled set of image data;
- and
- write the successive portions of the untiled set of image data in interleaved locations of the frame buffer to produce a tiled set of image data, wherein the interleaved locations are determined based on a tiling algorithm.
6 more elements
A video graphics processing system, comprising:
- a frame buffer storing at least image data, wherein at least a portion of the image data is in a tiled format;
- a cache operably coupled to the frame buffer, wherein the cache stores portions of the image data;
- a graphics processor operably coupled to the frame buffer and the cache, wherein the graphics processor reads image data from the frame buffer and the cache and constructs a derived image for display based on the image data;
- a processor operably coupled to the frame buffer and the graphics processor;
- and
- a main memory operably coupled to the processor, the graphics processor, and the frame buffer, wherein the main memory includes a selected storage location and a first set of instructions, wherein when executed the first set of instructions cause the processor to:
- read successive portions of an untiled set of image data stored in the frame buffer;
- write the successive portions of the untiled set of image data in interleaved locations of the selected storage location of the main memory to produce a tiled set of image data, wherein the interleaved locations are determined based on a tiling algorithm;
- and
- copy the tiled set of image data from the main memory to the frame buffer.
7 more elements
The apparatus of claim 31, wherein the main memory includes a second set of instructions wherein when executed the second set of instructions cause the processor to:
- read successive portions of the tiled set of image data stored in the frame buffer;
- write the successive portions of the tiled set of image data in de-interleaved locations of the selected storage location of the first memory to reproduce the untiled set of image data, wherein the de-interleaved locations are determined based on a untiling algorithm;
- and
- copy the untiled set of image data from the main memory to the frame buffer.
1 more element
Dependencies are inferred from the claim text.