Low power ramp generator for use in single slope A/D

An analog to digital converter comprising:

• a ramp signal generator that includes:
• a charge pump configured to receive an input timing signal having a timing edge and to provide, at an output, a voltage that increments by a fixed amount of voltage for each timing edge of said input timing signal, said charge pump having a storage capacitive element coupled to said output and a pump capacitive element;
• and
• a buffer coupled to said output of said charge pump, said buffer feeding back a second voltage based on the voltage at said output to said pump capacitive element of said charge pump without transferring charge from said storage capacitive element to said pump capacitive element.
• a comparator and corresponding latch for each analog input signal requiring conversion, said each analog input signal being coupled to a terminal of its corresponding comparator, said output of said ramp signal generator being coupled to another terminal of each comparator;
• and
• a counter having an output that produces an incrementing value, said output being coupled to said ramp signal generator configured to cause said ramp signal generator to increment said voltage of said ramp signal generator output upon every incrementing of said counter, said output of said counter also being coupled to an input of each latch, said latch outputting said counter value being input when its said corresponding comparator returns a signal.