Sample hold circuit and semiconductor device having the same
AssigneeCanon Kabushiki Kaisha
InventorHiroyuki Nakamura
Life of this patent
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Abstract
To form a high-speed, high-precision sample hold circuit with the minimum number of elements and low current consumption, there is provided a sample hold circuit including an operational amplifier including differential input stage in which sources or emitters are commonly connected, a cascode current mirror circuit for receiving a differential output from the different input stage, and a push-pull output stage having a diamond circuit connected to the cascode current mirror circuit, wherein a hold capacitor is connected to the output of the operational amplifier, and the push-pull output stage is switched between a buffer operation mode and a high-impedance output operation mode in accordance with a logic signal.
Claims10
A sample hold circuit comprising an operational amplifier including:
- a differential input stage in which sources are commonly connected,
- a cascode current mirror circuit for receiving a differential output from said differential input stage, and
- a push-pull output stage having a diamond circuit configuration of four transistors and being connected to said cascode current mirror circuit,
- wherein a hold capacitor is connected to an output of said operational amplifier, and
- said circuit further comprises switching means for switching said push-pull output stage between a buffer operation mode and a high-impedance output operation mode in accordance with a logic signal.
A sample hold circuit comprising an operational amplifier including:
- a differential input stage in which main electrodes are commonly connected,
- a cascode current mirror circuit for receiving a differential output from said differential input stage, and
- a push-pull output stage having a diamond circuit configuration of four transistors and being connected to said cascode current mirror circuit,
- wherein a hold capacitor is connected to said push-pull output stage, and
- said circuit further comprises switching means for switching said push-pull output stage between a buffer operation mode and a high-impedance output operation mode in accordance with a logic signal.
Dependencies are inferred from the claim text.