Voltage tolerant interface circuit
AssigneeSeiko Epson Corporation
InventorMasayuki Oshima
Life of this patent
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Abstract
An interface circuit functions as a so-called voltage tolerant circuit to which signals may be applied from, for example, a 3.3-V internal source or from an external source operating with a supply voltage greater than the internal source, for example, a 5-V source. By eliminating a floating voltage state in the internal circuits, problem-causing current leaks can be prevented in substantially all operating modes, that is, in any signal input or output mode, and in any voltage transition state, that is, irrespective of the sequence in which, for example, 0-V, 3.3-V, and 5-V signals are applied.
Claims8
A interface circuit comprising:
- a terminal that supplies a first power source (Vdd) having a first potential;
- a terminal that supplies a second power source (Vss) having a second potential lower than the first potential;
- a first driver circuit (P8, N2) that receives a data signal input;
- a second driver circuit (P1, N1) and a first node (node a) connecting an output from the first driver circuit to an input of the second driver circuit;
- an input/output pad connected to an output of the second driver circuit;
- a first protection circuit (P2, P5) that sets the second driver circuit to an off state by setting the first node to a potential higher than the first potential in response to a potential higher than the first potential of the first power source being applied from an external source to the input/output pad;
- a second node (node b) and a second protection circuit (P2, P6, P7) that sets the first driver circuit (P8, N2) to an off state when a potential higher than the first potential of the first power source is applied from an external source to the input/output pad by setting the second node to a potential higher than the first potential, said second node connected between the terminal for supplying the first power source and the terminal for supplying the second power source;
- and
- a third protection circuit (N3) that controls a state of the first driver circuit (P8, N2) by setting the second node to the second potential when a potential substantially equal to the second power source is applied to the input/output pad from an external source.
Dependencies are inferred from the claim text.