Method for improving a stepper signal in a planarized surface over alignment topography
AssigneeMicron Technology, Inc.
InventorsWilliam A. Stanton, Phillip G. Wald, Kunal R. Parekh
Life of this patent
Estimating the term…
Loading patent…
AssigneeMicron Technology, Inc.
InventorsWilliam A. Stanton, Phillip G. Wald, Kunal R. Parekh
Estimating the term…
A method and resulting structure for reducing refraction and reflection occurring at the interface between adjacent layers of different materials in a semiconductor device, assembly or laminate during an alignment step in a semiconductor device fabrication process. The method comprises forming a planar-surfaced layer of material, having a first index of refraction, over a substrate of the semiconductor device, assembly or laminate. A corrective layer is formed over the planar-surfaced layer and a second layer, having a second index of refraction, is then formed over the corrective layer. The corrective layer is composed of a material having an intermediate index of refraction between the first index of refraction and the second index of refraction. The method can also be modified to include one or more layers of materials and/or intermediate refraction layers interposed between or above any of the aforementioned adjacent layers. The aforementioned method and resulting structures can be further modified by forming an additional layer of material, having the requisite intermediate index of refraction, over an uppermost layer to further reduce reflection occurring at the interface between the uppermost layer and air. The invention is also directed to semiconductor devices, assemblies or laminates formed through the aforementioned methods and incorporating the aforementioned structures.
A semiconductor device structure having reduced refraction at the interface formed between adjacent layers of different materials, the semiconductor device structure formed by the method comprising:
A semiconductor device structure having improved alignment to at least one underlying non-planar layer of material in a multi-layered semiconductor device or assembly, the semiconductor device structure formed by the method comprising forming at least one corrective layer of material at the interface of one or more process layers overlying the at least one non-planar layer of material, the corrective layer of material having an intermediate index of refraction relative to the index of refraction of the materials forming the adjacent layers.
Dependencies are inferred from the claim text.