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US 6,144,093 AGranted
Commonly housed diverse semiconductor die with reduced inductance
AssigneeInternational Rectifier Corporation
InventorsChristopher Davis, Glynn Connah
Life of this patent
Estimating the term…
Abstract
A MOSFET die and a Schottky diode die are each mounted within a device package on a common lead frame pad with their drain and cathode terminals, respectively, connected together at the common pad. The source terminal of the MOS gated device and the anode terminal of the Schottky diode are each electrically connected by wire bonds to an insulated pin, and the gate electrode of the MOS gated device is electrically connected by wire bonds to another pin. A redundant wire connection runs from the source terminal of the MOS gated device to the anode terminal of the Schottky diode reduce the inductance in the anode lead.
Claims18
A semiconductor device comprising:
- a conductive lead frame having a main pad section with at least one integral pin extending from an edge thereof and having at least two pins separated from one another and from said main pad area;
- a first semiconductor die having a first electrode on one surface and at least a second electrode on an opposite surface;
- and
- a second semiconductor die having a first electrode on one surface and at least a second electrode on an opposite surface;
- said first electrodes of said first and second die being disposed atop and in electrical contact with said main pad area and being laterally spaced from one another;
- said second electrode of said first die being connected by a wire bond to a respective one of said at least two pins, and said second electrode of said second die being connected to said respective pin by another wire bond;
- said second electrodes of said first and second die having a further electrical connection directly between each other.
4 more elements
A T0220 package comprising:
- a conductive lead frame having a main pad section with at least one integral pin extending from an edge thereof and having at least two pins separated from one another and from said main pad area;
- a first semiconductor die comprising an MOS gated semiconductor device having a drain electrode on one surface and a source electrode and a gate electrode on an opposite surface;
- and
- a second semiconductor die comprising a Schottky diode having a cathode electrode on one surface and an anode electrode on an opposite surface;
- said drain electrode of said MOS gated device and said cathode electrode of said Schottky diode being disposed atop and in electrical contact with said main pad area and being laterally spaced from one another;
- said source electrode of said MOS gated device being connected by a wire bond to a respective one of said at least two pins, said anode electrode of said Schottky diode being connected by said respective pin by another wire bond and said gate electrode being wire bonded to another of said at least two pins;
- said source electrode and said anode electrode having a further electrical connection directly between each other.
4 more elements
A converter circuit comprising:
- a semiconductor device which comprises:
- a conductive lead frame having a main pad section with at least one integral pin extending from an edge thereof and having at least two pins separated from one another and from said main pad area,
- a first semiconductor die comprising a first MOS gated semiconductor device having a drain electrode on one surface and a source electrode and a gate electrode on an opposite surface, and
- a second semiconductor die comprising a Schottky diode having a cathode electrode on one surface and an anode electrode on an opposite surface,
- said drain electrode of said first MOS gated device and said cathode electrode of said Schottky diode being disposed atop and in electrical contact with said main pad area and being laterally spaced from one another,
- said source electrode of said MOS gated device being connected by a wire bond to a respective one of said at least two pins, said anode electrode of said Schottky diode being connected by said respective pin by another wire bond and said gate electrode being wire bonded to another of said at least two pins;
- said source electrode and said anode electrode having a further electrical connection directly between each other;
- a second MOS gated device having a drain electrically coupled to a supply voltage terminal and a source terminal electrically coupled to said drain terminal said first MOS gated device and to said cathode terminal of said Schottky diode;
- said source terminal of said first MOS gated device and said anode terminal of said Schottky diode being electrically coupled to a ground terminal;
- and
- a controller coupled to each of said gate terminals of said first and second MOS gated devices.
8 more elements
A semiconductor device comprising:
- a conductive lead frame having a main pad section with at least one integral pin extending from an edge thereof and having at least two pins separated from one another and from said main pad area;
- a first semiconductor die having a first electrode on one surface and at least a second electrode on an opposite surface;
- and
- a second semiconductor die having a first electrode on one surface and at least a second electrode on an opposite surface;
- said first electrodes of said first and second die being disposed atop and in electrical contact with said main pad area and being laterally spaced from one another;
- said second electrode of said first die being connected by a first wire bond to a respective one of said at least two pins, and said second electrode of said second die being connected to said respective pin by a second wire bond;
- said second electrode of said first die being further electrically connected to said second electrode of said second die by a third wire bond that is redundant with said first and second wire bonds.
4 more elements
Dependencies are inferred from the claim text.