High breakdown-voltage transistor with electrostatic discharge protection
AssigneeTexas Instruments Incorporated
InventorsJoseph A. Devore, Ross E. Teggatz, David J. Baldwin
Life of this patent
Estimating the term…
Abstract
A transistor including a source region 506 in a semiconductor body 502; a bulk region 508 in the semiconductor body adjacent the source region; a drain region in the semiconductor body adjacent the bulk region but opposite the source region, the drain region including doped regions 504,514 of n and p dopant types; and a field plate 516 formed over the semiconductor body adjacent the drain region between the drain region and the bulk region.
Claims19
A transistor, comprising:
- (a) a source region in a semiconductor body;
- (b) a bulk region in said semiconductor body adjacent said source region;
- (c) a drain region in said semiconductor body adjacent said bulk region but opposite said source region, said drain region comprising doped regions of n and p dopant types;
- (d) a field plate over and insulated from said semiconductor body adjacent said drain region between said drain region and said bulk region;
- and
- (e) a gate over and insulated from said semiconductor body adjacent said bulk between said drain region and said source region, wherein said field plate and said gate are formed from a common layer.
A lateral double-diffused MOS transistor, comprising:
- (a) a tank region formed in a substrate;
- (b) a bulk region formed in said tank region, a portion of said bulk region extending to a surface of said tank region;
- (c) a source region formed in said bulk region;
- (d) a source electrode coupled to said source region and said bulk region;
- (e) a gate electrode over and insulated from said portion of said bulk region extending to a surface of said tank region;
- (f) a drain region comprising n and p doped regions, said drain region separated from said bulk region by a drain drift region in said tank region;
- (g) a field plate over and insulated from said drain drift region and adjacent said drain region, said field plate and said gate formed from a common layer;
- and
- (h) a drain electrode coupled to said drain region and said field plate.
A lateral double-diffused MOS transistor with an integral SCR, comprising:
- (a) a tank region doped with a first dopant species and formed in a substrate doped with a second dopant species, said second species a dopant type opposite the first type;
- (b) a bulk region doped with said second dopant species and formed in said tank region, a portion of said bulk region extending to a surface of said tank region;
- (c) a source region doped with said first dopant species and formed in said bulk region;
- (d) a back gate region contact doped with said second dopant species and formed in said bulk region;
- (e) a source electrode coupled to said source region and said back gate region;
- (f) a gate electrode over and insulated from said portion of said bulk region extending to a surface of said tank region;
- (g) a drain region comprising a region doped with said first dopant species and a region doped with said second dopant species, said drain region separated from said bulk region by a drain drift region in said tank region;
- (h) a field plate over and insulated from said drain drift region and adjacent said drain region, said field plate and said gate formed from a common layer;
- and
- (i) a drain electrode coupled to said drain region and said field plate.
Dependencies are inferred from the claim text.