Heterojunction field effect transistor and method of fabricating the same

A heterojunction field effect transistor comprising:

• a buffer layer arranged on a semiconductor substrate;
• a channel layer arranged on the buffer layer;
• a spacer layer arranged on the channel layer;
• a carrier supply layer arranged on the spacer layer;
• a Schottky barrier layer arranged on the carrier supply layer;
• an etching stopper layer arranged on the Schottky barrier layer;
• a cap layer arranged on the etching stopper layer and containing a high concentration dopant;
• a source electrode and drain electrode arranged apart from each other on the cap layer;
• a recess formed in a region of the cap layer sandwiched between the source and drain electrodes so as to extend from the cap layer to the Schottky barrier layer via the etching stopper layer;
• the Schottky barrier layer is covered with the etching stopper layer to both sides of the gate electrode;
• and
• the gate electrode is separated from the cap layer, the gate electrode being ledge-shaped such that the gate electrode is partly formed on a surface of said Schottky barrier layer exposed in the recess, and partly formed on the stopper layer exposed in the recess.