Silicon-rich block copolymers to achieve unbalanced vias
AssigneeIntel Corporation
InventorsChuanbin Pan, Chien Chiang
Life of this patent
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Abstract
An integrated circuit and method for making it is described. The integrated circuit includes an insulating layer, formed within a trench that separates conductive elements of a conductive layer, that has a low dielectric constant. The insulating layer is convertible at least in part into a layer that is resistant to a plasma that may be used for a photoresist ashing step or to a solvent that may be used for a via clean step. Preferably the insulating layer comprises a silicon containing block copolymer that is convertible at least in part into a silicon dioxide layer. The silicon dioxide layer protects the remainder of the insulating layer from subsequent processing, such as photoresist ashing and via clean steps.
Claims11
A method of forming an integrated circuit comprising:
- forming on a substrate a conductive layer that has conductive elements separated by a trench;
- forming a first insulating layer within the trench that has a low dielectric constant and that is convertible at least in part into a layer that is resistant to a plasma that may be used for a photoresist ashing step or to a solvent that may be used for a via clean step;
- forming a second insulating layer on top of the first insulating layer;
- and
- etching an unlanded via through the second insulating layer.
A method of forming an integrated circuit comprising:
- forming on a substrate a first conductive layer having conductive elements separated by a trench;
- forming a first insulating layer within the trench that has a low dielectric constant and that is convertible at least in part into a layer that is resistant to a plasma that may be used for a photoresist ashing step or to a solvent that may be used for a via clean step;
- forming a second insulating layer on top of the first insulating layer;
- patterning a photoresist layer over the second insulating layer to define a via formation region;
- etching an unlanded via, defined by the via formation region, that extends from the surface of the second insulating layer to the first conductive layer;
- removing the photoresist layer to convert at least part of the first insulating layer into a third insulating layer that is resistant to a plasma used for the photoresist ashing step or to a solvent used for a via clean step, the third insulating layer protecting the remaining portion of the first insulating layer from the photoresist removal step;
- forming a conductive plug that fills the unlanded via etched through the second insulating layer;
- and
- forming a second conductive layer on top of the second insulating layer that is connected to the first conductive layer with the conductive plug.
A method of forming an integrated circuit comprising:
- forming on a substrate a first conductive layer having conductive elements separated by a trench;
- forming an insulating layer within the trench that comprises a silicon containing block copolymer;
- forming a first layer of silicon dioxide on top of the insulating layer;
- patterning a photoresist layer over the first silicon dioxide layer to define a via formation region;
- etching an unlanded via, defined by the via formation region, that extends from the surface of the first silicon dioxide layer to the first conductive layer;
- removing the photoresist layer converting at least part of the insulating layer into a second silicon dioxide layer, the second silicon dioxide layer protecting the remaining portion of the insulating layer from the photoresist removal step;
- forming a conductive plug that fills the unlanded via etched through the first silicon dioxide layer;
- and
- forming a second conductive layer on top of the first silicon dioxide layer that is connected to the first conductive layer with the conductive plug.
Dependencies are inferred from the claim text.