High voltage transistor with high gated diode breakdown, low body effect and low leakage

A method of manufacturing a semiconductor device, which method comprises:

• isolating a substantially rectilinear active area on a main surface of a semiconductor substrate, the active area comprising a first source/drain region and a second source/drain region, each having a source/drain width and a source/drain length, separated by a channel region having opposing ends not abutting either of the source/drain regions along the source/drain length;
• providing a field implant blocking mask covering the first source/drain region and extending over the channel region, the field implant blocking mask having a pair of substantially rectangular notches, each notch protruding into the channel region a predetermined distance along the source/drain width from one of the opposing ends of the channel region;
• implanting impurities to form a field implant in the substrate;
• forming a gate oxide layer over the channel region,
• providing a threshold voltage implant blocking mask over the first source/drain region;
• implanting impurities to form a threshold adjust implant in the substrate;
• forming a gate on the gate oxide layer;
• and
• implanting impurities to form a lightly doped junction implant in the substrate.