Electrostatic protected substrate

A method of making an integrated circuit (IC) package with an electrostatic protected IC substrate, said method comprising:

• (a) selecting an IC chip, the IC chip having contact pads on one surface thereof;
• (b) providing an IC substrate;
• (c) forming a plurality of conductive traces on a first surface of the IC substrate;
• (d) forming a layer of solder resist over said plurality of conductive traces;
• (e) removing a portion of the layer of solder resist exposing a portion of said conductive traces;
• (f) electrically shorting the exposed portion of said conductive traces together by adhering an easily removed conductive material to the traces;
• (g) attaching the IC chip to the first surface of the IC substrate;
• and
• (h) electrically connecting the contact pads of the IC chip to the conductive traces, thereby making an IC package with an electrostatic protected IC substrate.

A method of making an integrated circuit (IC) package with an electrostatic protected IC substrate, said method comprising:

• (a) selecting an IC chip, the IC chip having contact pads on one surface thereof;
• (b) providing an IC substrate having a first surface including a inner section and a non-functioning area;
• (c) forming a plurality of conductive traces on said first surface of the IC substrate;
• (d) forming a layer of solder resist over the conductive traces;
• (e) removing said layer of solder resist from the non-functioning area;
• (f) electrically grounding the conductive traces by shorting the conductive traces together across the non-functioning area with an electrically conductive material;
• (g) attaching the IC chip to the inner section of the IC substrate;
• (h) electrically connecting the contact pads of the IC chip to the conductive traces;
• and
• (i) removing the non-functioning area and the electrically conductive material at the same time and before final electrical testing of the IC package.