Low voltage drop integrated analog amplifier without external compensation network

An integrated amplifier comprising:

• a differential input stage comprising a first pair of bipolar junction transistors;
• a reference bias current generator for biasing said differential input stage with a reference bias current;
• a first and a second current mirror circuit being driven by a respective transistor of said first pair of bipolar junction transistors, each of said first and second current mirror circuits comprising
• a transistor having a base terminal connected to an intermediate node, and
• an integrated resistor connected to the intermediate node and in series with the respective transistor of said first pair of bipolar junction transistors, the reference bias current for said differential input stage conducts through said integrated resistor;
• and
• an output stage comprising a second pair of bipolar junction transistors, said second pair of bipolar junction transistors being controlled by a respective transistor of said first and second current mirror circuits.

An method for forming a low voltage drop integrated amplifier, the method comprising the steps of:

• connecting a first pair of bipolar junction transistors together for forming a differential input stage;
• biasing the differential input stage with a reference bias current;
• driving a first and a second current mirror circuit by a respective transistor of the first pair of bipolar junction transistors, each of the first and second current mirror circuits comprising a transistor having a base terminal connected to an intermediate node;
• conducting the reference bias current of the differential input stage through an integrated resistor connected to the intermediate node, the integrated resistor in series with the respective transistor of the first pair of bipolar junction transistors;
• and
• controlling a second pair of bipolar junction transistors by a respective transistor of the first and second current mirror circuits, the second pair of bipolar junction transistors connected together to form an output stage.