Space management for managing high capacity nonvolatile memory

A digital system including a host and at least two nonvolatile memory devices, the host for storing digital information in the nonvolatile memory devices and reading the stored digital information from the nonvolatile memory devices, the memory devices being organized into blocks of sectors of information, the digital system comprising:

• a space manager circuit responsive to address information from the host and operative to read, write or erase information in the nonvolatile memory devices based upon the host address information, the space manager for assigning a predetermined number of blocks, in sequential order, to each of the nonvolatile memory devices, for forming `super` blocks, each `super` block having a plurality of blocks and wherein blocks of the same sequential number in each of the nonvolatile memory devices are in like position relative to each other, the space manager circuit further for identifying a particular `super` block having at least two blocks, a first block being located in a first nonvolatile memory device and a second block being located in a second nonvolatile memory device, for erasing the first and second blocks so that erasure of the second block is performed without waiting for completion of the erasure of the first block, and for indicating the status of the first and second nonvolatile memory devices to be busy during erasure of the first and second selected blocks,
• wherein the speed of erase operations is substantially increased thereby increasing the overall performance of the digital system.

A method for use in a digital system having a host coupled to a nonvolatile memory device, the host for storing digital information in the nonvolatile memory device and reading the stored digital information from the nonvolatile memory device, the memory unit being organized into blocks of sectors of information, the method for erasing digital information stored in the blocks of the nonvolatile memory device and comprising:

• a. assigning a predetermined number of blocks, in sequential order, to the nonvolatile memory device, each block having a predetermined number of sectors;
• b. forming `super` blocks, each `super` block comprising a plurality of blocks;
• c. identifying a particular `super` block having at least two blocks, a first block and a second block for erasure of the particular `super` block;
• d. erasing the first and second selected blocks of the particular `super` block so that erasure of the second block is performed without waiting for completion of the erasure of the first block;
• and
• e. indicating the status of the first and second nonvolatile memory devices to be busy during erasure of the first and second selected blocks,
• wherein the speed of erase operations in the digital system is substantially increased thereby increasing the overall performance of the digital system.