Rate 24/25 (0,9) code method and system for PRML recording channels

Apparatus for decoding a 24/25 (0,9) codeword to provide first, second and third bytes representing binary data, the apparatus comprising:

• a word de-interleaver adapted to divide the 24/25 (0,9) codeword into first and second nibbles and a 16/17 (0,5) codeword based on a set of pivot bits of the 24/25 (0,9) codeword, the first and second nibbles forming the third byte;
• a storage circuit, coupled to receive the 16/17 (0,5) codeword, adapted to store the 16/17 (0,5) codeword as N symbols;
• a processor, coupled to the storage circuit, adapted to provide preserved bits from the N symbols of the 16/17 (0,5) codeword based on the set of pivot bits and determines, from the set of pivot bits, whether the first and second bytes include a code violation, the set of pivot bits identifying a type and a position of any code violation in the first and second bytes, each code violation corresponding to a given bit sequence within the first and second bytes;
• and
• a decoder circuit adapted to form the first and second bytes from the preserved bits and the given bit sequence of each code violation in accordance with the set of pivot bits,
• wherein the decoder circuit decodes by reconstructing, as necessary, any code violation in the first and second bytes as the given bit sequence having the type and at the position as defined by the set of pivot bits, and by assigning the preserved bits to respective locations in the first and second bytes in accordance with the set of pivot bits.

A method of encoding a first, second and third bytes of binary data as a 24/25 (0,9) codeword, the method comprising the steps of:

• (a) dividing 1) the first and second bytes into first and second bit strings by inserting a pivot bit therebetween, and 2) the third byte into first and second nibbles;
• (b) determining whether each of the first and second bit strings contains at least one code violation in accordance with a 16/17 (0,5) code construction, each code violation corresponding to a given bit sequence;
• (c) correcting, as necessary, any code violation in the first and second bit strings by:
• (c1) defining values for one or more bits in each of the first and second bit strings as additional pivot bits, the additional pivot bits identifying a type and a position of the code violation;
• (c2) preserving values for bits not included in the given bit sequence corresponding to the code violation;
• and
• (c3) assigning values, as necessary, for one or more bits of the given bit sequence;
• and
• d) inserting the first and second nibbles adjacent to corresponding pivot bits to form the 24/25 (0,9) codeword.

A method of decoding a 24/25 (0,9) codeword to provide a dataword having first, second, and third bytes, the method comprising the steps of:

• a) identifying a set of pivot bits within the 24/25 (0,9) codeword;
• b) dividing the 24/25 (0,9) codeword into first and second nibbles and a 16/17 (0,5) codeword based on the set of pivot bits, the 16/17 (0,5) codeword including a set of pivot bits and a set of preserved bits, and the first and second nibbles being the third byte;
• c) determining, from the set of pivot bits, whether the first and second bytes include a code violation, the set of pivot bits identifying a type and position of any code violation, each code violation corresponding to a given bit sequence within the sequence of first and second bytes;
• d) forming the first and second bytes from the preserved bits and the given bit sequence of each code violation in accordance with the set of pivot bits.

An integrated circuit including an encoding apparatus for providing a 24/25 (0,9) codeword from three bytes of binary data, the encoding apparatus comprising:

• a storage circuit, coupled to an input stream to receive the three bytes, adapted to store the first and second bytes as first and second bit strings and the third byte as first and second nibbles;
• a processor, coupled to the storage circuit, adapted to determine in accordance with a 16/17 (0,5) code construction whether each of the first and second bit strings contains at least one code violation, each code violation corresponding to a given bit sequence, the processor identifying a type and a position of the code violation;
• an encoder circuit, coupled to the storage circuit, adapted to insert a pivot bit between the first and second bit strings and encode the first and second bit strings with the pivot bit inserted therebetween into a 16/17 (0,5) codeword based on the type and the position of each code violation identified by the processor,
• wherein the encoder circuit encodes by correcting, as necessary, any code violation in the first and second bit strings by 1) setting the inserted pivot bit to a first value, 2) defining values for a bit in each of the first and second bit strings as additional pivot bits, the additional pivot bits identifying the type and the position of each code violation, 3) preserving values for bits not included in the given bit sequence corresponding to the code violation, and 4) assigning values, as necessary, for one or more bits of the given bit sequence;
• and
• a word interleaver adapted to insert the first and second nibbles of the third byte adjacent to the additional pivot bits of the first and second bit strings in the 16/17 (0,5) codeword, respectively, to produce the 24/25 (0,9) codeword.

An integrated circuit including a decoding apparatus for decoding a 24/25 (0,9) codeword to provide first, second and third bytes representing binary data, the decoding apparatus comprising:

• a word de-interleaver adapted to divide the 24/25 (0,9) codeword into first and second nibbles and a 16/17 (0,5) codeword based on a set of pivot bits of the 24/25 (0,9) codeword, the first and second nibbles forming the third byte;
• a storage circuit, coupled to receive the 16/17 (0,5) codeword, adapted to store the 16/17 (0,5) codeword as N symbols;
• a processor, coupled to the storage circuit, adapted to provide the preserved bits from the N symbols of the 16/17 (0,5) codeword based on the set of pivot bits and determines, from the set of pivot bits, whether the first and second bytes include a code violation, the set of pivot bits identifying a type and a position of any code violation in the first and second bytes, each code violation corresponding to a given bit sequence within the first and second bytes;
• and
• a decoder circuit adapted to form the first and second bytes from the preserved bits and the given bit sequence of each code violation in accordance with the set of pivot bits,
• wherein the decoder circuit decodes by reconstructing, as necessary, any code violation in the first and second bytes as the given bit sequence having the type and at the position as defined by the set of pivot bits, and by assigning the preserved bits to respective locations in the first and second bytes in accordance with the set of pivot bits.