Flash memory structure with floating gate in vertical trench

A flash memory cell comprising:

• a substrate having a trench formed therein and below a surface thereof;
• a vertical bit line deposited in said trench below the substrate surface;
• a drain region formed in said substrate below said bit line;
• a split floating gate deposited in said trench below the substrate surface to a depth less than said vertical bit line, said floating gate comprising a first vertical portion on one side of said bit line and a second vertical portion on another side of said bit line opposite said first vertical portion, each vertical portion of said split floating gate extending above the substrate surface and being accessed by said bit line;
• a source region formed below the substrate surface spaced apart from at the same level and adjacent at least one of the floating gate vertical portions;
• and
• a word line extending over said substrate, bit line and floating gate vertical portions, and along sides of the floating gate vertical portions extending above the substrate.

A flash memory cell comprising:

• a substrate having a trench formed therein and below a surface thereof;
• a vertical bit line deposited in said trench below the substrate surface, the bit line extending from a bottom of the trench to above the substrate surface;
• a drain region formed in said substrate below said bit line;
• a split floating gate deposited in said trench below the substrate surface to a depth less than said vertical bit line, said floating gate comprising a first vertical portion on one side of said bit line and a second vertical portion on another side of said bit line opposite said first vertical portion, each vertical portion of said split floating gate extending from a bottom of the trench to above the substrate surface and being accessed by said bit line;
• a tunneling gate oxide on sides of the floating gate vertical portions extending above the substrate;
• a source region formed below the substrate surface spaced apart from at the same level and adjacent at least one of the floating gate vertical portions;
• and
• a word line extending over said substrate, bit line and floating gate vertical portions, and along sides of tunneling gate oxide and floating gate vertical portions extending above the substrate, wherein electrons may flow from the floating gate vertical portions to the word line through tunneling gate oxide into the sides of the floating gate vertical portions extending above the substrate.