US 6,127,891 AGranted

Low voltage class AB amplifier with gain boosting

AssigneeNational Semiconductor Corporation

InventorsRudy G. H. Eschauzier, Rehan A. Zakai

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Abstract

A low voltage amplifier with gain boosting and a reduced power supply voltage requirement. A cascode amplifier circuit, biased with the power supply voltage, amplifies a pair of related, differential input signals based upon a pair of gain boost control signals and in accordance therewith provides a pair of gain boosted signals which correspond to the input signals. A gain boost control circuit, also biased with the power supply voltage, uses the differential input signals to generate the gain boost control signals. A class AB amplifier circuit, also biased with the power supply voltage, amplifies the gain boosted signals and in accordance therewith provides a class AB output signal which corresponds to the original input signals. The cascode amplifier circuit, gain boost control circuit and class AB amplifier circuit together operate with a minimum power supply voltage which equals a sum of one active transistor input bias potential and two active transistor output bias potentials (V.sub.DD(min) -V.sub.SS =V.sub.gs +V.sub.dsat +V.sub.ce).

Claims20

Dependent claims

An apparatus including a low voltage amplifier with gain boosting and a reduced power supply voltage requirement, comprising:

first and second power terminals configured to convey a power supply voltage;
a gain boost control circuit, coupled between said first and second power terminals, configured to receive said power supply voltage and a plurality of input signals and in accordance therewith provide a plurality of gain boost control signals;
a cascode amplifier circuit, coupled between said first and second power terminals and to said gain boost control circuit, configured to receive said power supply voltage, a portion of said plurality of input signals and said plurality of gain boost control signals and in accordance therewith provide a plurality of gain boosted signals which correspond to said plurality of input signals;
and
a class AB amplifier circuit, coupled between said first and second power terminals and to said cascode amplifier circuit, configured to receive said power supply voltage and said plurality of gain boosted signals and in accordance therewith provide a class AB output signal which corresponds to said plurality of input signals;
wherein said cascode amplifier circuit, said gain boost control circuit and said class AB amplifier circuit together operate with a minimum power supply voltage from said first and second power terminals which equals a sum of:
one active transistor input bias potential across
gate and source terminals of a metal oxide semiconductor field effect transistor, or
base and emitter terminals of a bipolar junction transistor;
one active transistor output bias potential across
drain and source terminals of another metal oxide semiconductor field effect transistor, or
collector and emitter terminals of another bipolar junction transistor;
and
another active transistor output bias potential across
drain and source terminals or still another metal oxide semiconductor field effect transistor, or
collector and emitter terminals of still another bipolar junction transistor.

13 more elements

An apparatus including a low voltage amplifier with gain boosting using a dynamically biased cascode amplifier circuit, comprising:

a first bias signal generator circuit configured to receive a first differential input signal and in accordance therewith provide a first bias signal;
a second bias signal generator circuit configured to receive a second differential input signal and in accordance therewith provide a second bias signal;
a first dual cascode amplifier circlit, coupled to said first bias signal generator circuit, which includes first and second transistors with
first and second bias terminals, respectively, configured to both receive said first bias signal,
first and second input terminals, respectively, configured to both receive said portion of said first differential input signal, and
first and second output terminals, respectively, configured to provide first and second cascade output signals, respectively;
a second dual cascode amplifier circuit, coupled to said second bias signal generator circuit and telescopically coupled to said first dual cascode amplifier circuit, which includes third and fourth transistors with
third and fourth bias terminals, respectively, configured to both receive said second bias signal,
third and fourth input terminals, respectively, configured to both receive said portion of said second differential input signal, and
third and fourth output terminals, resrectively, configured to provide third and fourth cascode output signals, respectively;
and
a class AB amplifier circuit, coupled to said first and second dual cascode amplifier circuits, configured to receive and combine said first and third cascode output signals and receive and combine said second and fourth cascode output signals and in accordance therewith provide a class AB output signal which corresponds to said first and second differential input signals.

9 more elements

Dependencies are inferred from the claim text.