Energy economized pass-transistor logic circuit and full adder using the same

An N-bit full adder including at least one pass-transistor logic circuit, comprising:

• a functional block that adds inputs to generate at least two pairs of complementary signals;
• and
• a level restoration block that restores a high level signal of said complementary signals to a strong high level signal and that prevents leakage current from flowing through said level restoration block due to said high level signal, the level restoration block including first and second CMOS inverters that restore a weak high level signal to a strong high level signal and a circuit that prevents leakage current from flowing through one of said first and said second CMOS inverters to which said weak high level is applied by transferring an output of the other of said CMOS inverters, to which said strong low level signal is applied, to the one of said CMOS inverters.