US 6,105,129 A · Converting register data from a first format type to a second format type if a second type instruction consumes data produced by a first type instruction

Abstract

A microprocessor includes one or more registers which are architecturally defined to be used for at least two data formats. In one embodiment, the registers are the floating point registers defined in the x86 architecture, and the data formats are the floating point data format and the multimedia data format. The registers actually implemented by the microprocessor for the floating point registers use an internal format for floating point data. Part of the internal format is a classification field which classifies the floating point data in the extended precision defined by the x86 microprocessor architecture. Additionally, a classification field encoding is reserved for multimedia data. As the microprocessor begins execution of each multimedia instruction, the classification information of the source operands is examined to determine if the data is either in the multimedia class, or in a floating point class in which the significand portion of the register is the same as the corresponding significand in extended precision. If so, the multimedia instruction executes normally. If not, the multimedia instruction is faulted. Similarly, as the microprocessor begins execution of each floating point instruction, the classification information of the source operands is examined. If the data is classified as multimedia, the floating point instruction is faulted. A microcode routine is used to reformat the data stored in at least the source registers of the faulting instruction into a format useable by the faulting instruction. Subsequently, the faulting instruction is re-executed.

Claims49

Dependent claims

A method for managing access to one or more registers which are shared by a first execution unit of a first type and a second execution unit of a second type different than said first type, the method comprising:

updating a first register within said one or more registers responsive to a first instruction executed in said first execution unit;
faulting a second instruction executable by said second execution unit, said second instruction having said first register as a source operand, said faulting comprising flushing said second instruction and instructions subsequent to said second instruction;
converting data stored in said first register from a first format used by said first execution unit to a second format used by said second execution unit responsive to said faulting;
and
executing said second instruction subsequent to said converting.

2 more elements

A microprocessor comprising:

at least one register accessible responsive to both a first type of instructions and a second type of instructions;
a first execution unit configured to execute said first type of instructions, wherein said first execution unit is configured to store a result from executing said first type of instructions into said at least one register in a first format, and wherein said first execution unit is configured to fault a first instruction of said first type which accesses said at least one register if said at least one register is storing data in a second format different from said first format;
a second execution unit configured to execute said second type of instructions, wherein said second execution unit is configured to store a result from executing said second type of instructions into said at least one register in said second format, and wherein said second execution unit is configured to fault a second instruction of said second type which accesses said at least one register if said at least one register is storing data in said first format;
a reorder buffer coupled to said first execution unit and said second execution unit, wherein said reorder buffer is configured to signal a microcode unit upon selecting said first instruction or said second instruction for retirement;
and
said microcode unit configured to dispatch a routine responsive to said signal from said reorder buffer.

3 more elements

Dependencies are inferred from the claim text.

Converting register data from a first format type to a second format type if a second type instruction consumes data produced by a first type instruction

Life of this patent

Converting register data from a first format type to a second format type if a second type instruction consumes data produced by a first type instruction

Life of this patent

Abstract

Claims49