Scatter gather memory system for a hardware accelerated command interpreter engine
AssigneeAdaptec, Inc.
InventorBahareh Ghaffari
Life of this patent
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AssigneeAdaptec, Inc.
InventorBahareh Ghaffari
Estimating the term…
A hardware accelerated memory system in a hardware accelerated I/O data processing engine that gathers and maintains pointers to a set of widely distributed source and/or destination data locations. The locations of the source and/or destination data locations operated on by the I/O data processing engine can include a memory local to the command interpreter and a memory remote from but accessible to the command interpreter by way of an I/O bus. Each source and/or destination scatter/gather list contains pointers to actual data locations that are either in a memory local to the command interpreter or a memory remote from the command interpreter but accessible by way of an interconnecting I/O bus. Each data location entry in a scatter/gather list is also accompanied by a byte count indicative of the total number of bytes at a given data location.
An improved performance scatter gather memory system for use in a command interpreter of an I/O controller for a local host processor, said system comprising:
A method for operating a scatter gather memory system in a hardware implemented command interpreter of an I/O controller in a local host computer, said method comprising:
A method for using a scatter gather memory system in a command interpreter of an I/O controller, said command interpreter having a command queue, a logic unit, at least one local memory, and a controlling state machine, said method comprising:
Dependencies are inferred from the claim text.