System for preventing radiation failures in programmable logic devices
AssigneeXilinx, Inc.
InventorPeter H. Alfke
Life of this patent
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Abstract
A radiation-tolerant logic circuit includes three similarly configured SRAM-based PLDs. These PLDs work in parallel to provide identical logic functions. To guard against data corruption that can result from radiation-induced upsets, the logic circuit includes a state-comparison circuit that periodically performs a bitwise comparison of the configuration and user data from each of the PLDs; if a bit from one PLD differs from the corresponding bit from the others, the state-comparison circuit sets a flag that indicates that the differing PLD is in error. The erroneous PLD is then reprogrammed using error-free state data. In one embodiment, the error-free state data is read from an error-free PLD.
Claims17
A system comprising:
- a. a first programmable logic devise (PLD) having a first input terminal, a first output terminal, and a first readback terminal;
- b. a second PLD having a second input terminal connected to the first input terminal, a second output terminal, and a second readback terminal;
- c. a third PLD having a third input terminal connected to the first input terminal, a third output terminal, and a third readback terminal;
- and
- d. a state-comparison circuit including:
- i. a first comparison-circuit input terminal connected to the first readback terminal;
- ii. a second comparison-circuit input terminal connected to the second readback terminal;
- and
- iii. a third comparison-circuit input terminal connected to the third readback terminal.
A system comprising:
- a. a first programmable logic device (PLD) having a first input terminal, a first output terminal, and a first readback terminal;
- b. a second PLD having a second input terminal connected to the first input terminal, a second output terminal, and a second readback terminal;
- and
- c. a state-comparison circuit including:
- i. a first comparison-circuit input terminal connected to the first readback terminal;
- and
- ii. a second comparison-circuit input terminal connected to the second readback terminal.
A system comprising:
- a. a plurality of programmable logic devices (PLDs), each having a PLD input terminal, a PLD output terminal, and a readback terminal;
- and
- b. a state-comparison circuit including a plurality of comparison-circuit input terminals each connected to a respective one of the readback terminals.
A method of detecting state errors in a plurality of programmable logic device, the method comprising:
- a. reading data from a first programmable logic device to obtain a first set of state data;
- b. reading data from a second programmable logic device to obtain a second set of state data;
- and
- c. comparing the first and second sets of state data.
Dependencies are inferred from the claim text.