Operational amplifier having a wide input/output range and an improved slew rate
AssigneeNEC Corporation
InventorFumihiko Kato
Life of this patent
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Abstract
An operational amplifier having an input stage including a differential transistor pair and an output stage receiving an output of the input stage for outputting an output signal having a wide output range. The input stage includes a field effect transistor connected in parallel to a constant current source for the differential transistor pair and having a gate connected to receive a level-shifted signal of an output of the input stage, so that when the output signal of the output stage changes, the field effect transistor is turned on so as to supplying an additional bias current to the differential transistor pair in addition to a bias current supplied by the constant current source, so that the slew rate of the output signal of the output stage is elevated.
Claims10
An operational amplifier including:
- an input stage having a first differential transistor pair composed of a pair of transistors connected between a first constant current source and two output nodes and having control electrodes connected to two signal input terminals, respectively, so that a signal applied between said two signal input terminals is amplified in a differential manner, and an output signal is obtained from a selected output node of said two output nodes;
- an output stage having two output transistors of different conductivity types, connected in series between two power supply terminals, a connection node between said two output transistors being connected to an output signal terminal, and a level shift circuit receiving said output signal of said input stage for generating a level-shifted signal of said output signal of said input stage;
- said output signal of said input stage and said level-shifted signal being applied to control electrodes of said two output transistors, respectively, so that said two output transistors drive said output signal terminal in a push-pull manner;
- and
- a capacitance between said selected output node of said input stage and said output signal terminal,
- said input stage including a first bias current supplementing means connected in parallel to said first constant current source, for selectively supplying an additional bias current to said first differential transistor pair in accordance with said level-shifted signal.
Dependencies are inferred from the claim text.