Wavetable cache using simplified looping

A method of operating an audio wavetable synthesizer comprising:

• configuring a memory to include a voice sample storage patch including a plurality of loop samples beginning at a start address and extending to an end address, the voice sample storage patch further including a plurality of repeated loop samples repeating the voice sample storage patch samples beginning at the start address and extending the burst size, the repeated loop samples being appended to the voice sample storage patch following the end address sample;
• transferring data from the memory to a wavetable audio synthesis device in bursts of the burst-size plurality of data samples;
• controlling the burst transmission to transfer a burst of data extending past the end address to include at least one repeated loop sample;
• and
• resetting an address of the next burst beyond the start address to account for the at least one repeated loop sample.

A memory for usage with an audio wavetable synthesizer comprising:

• a voice sample storage patch including:
• a plurality of loop samples beginning at a start address and extending to an end address;
• and
• a plurality of repeated loop samples repeating the voice sample storage patch samples beginning at the start address and extending the burst size, the repeated loop samples being appended to the voice sample storage patch following the end address sample.

A computer system comprising:

• a processor;
• an interface bus coupled to the processor, the processor transferring data using a burst transmission of a plurality of data samples having a burst size;
• a memory coupled to the interface bus and including a voice sample storage patch including a plurality of loop samples beginning at a start address and extending to an end address, the voice sample storage patch further including a plurality of repeated loop samples repeating the voice sample storage patch samples beginning at the start address and extending the burst size, the repeated loop samples being appended to the voice sample storage patch following the end address sample;
• a wavetable audio synthesis device coupled to the interface bus to receive the burst-size plurality of data samples from the memory;
• and
• a burst data transmission interface that controls the burst transmission from the memory to the wavetable audio synthesis device, the burst data transmission interface controlling the burst transmission to transfer a burst of data extending past the end address to include at least one repeated loop sample, the burst data transmission interface resetting an address of the next burst beyond the start address to account for the at least one repeated loop sample.