Security apparatus for data transmission with dynamic random encryption

A security apparatus comprising:

• a processor;
• a plurality of memories coupled to said processor, where each memory stores an encryption schema including a random array of bits;
• a number input device coupled to said processor to at least partially provide a starting address for at least one of said plurality of memories;
• and
• an address register process executing on said processor, said address register process maintaining an address register variable initially storing said starting address, said address register process operable to access at least one of said encryption schemas in order to generate a length of string identifier, an encryption algorithm identifier, and a relative address code;
• an address incrementing process executing on said processor, said address incrementing process responsive to said relative address code and operable to increment said address register variable,
• whereby said encryption algorithm identifier identifies a particular encryption algorithm utilized to encrypt a set of data having a size defined by said length of string identifier.