Alignment correction method and semiconductor device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorTsuneo Yasuda
Life of this patent
Estimating the term…
Loading patent…
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorTsuneo Yasuda
Estimating the term…
An alignment correction method which can obtain proper correction values and a semiconductor device fabricated through this alignment method are obtained. An alignment correction part (6a) calculates a stepper correction value which is set in a stepper (4a) in next alignment from trends of true shift amounts obtained from a plurality of types of processes. The true shift amount, which is the difference between stepper correction value set in the stepper and overlay check correction values detected by overlay checking devices, is actual shift amount upon alignment. The number of the true shift amounts obtained from the plurality of types of processes is larger than that of true shift amounts obtained from a single process. Thus, a trend of the true shift amounts is proper, whereby a correction value set in the stepper for the next alignment becomes proper.
An alignment correction method, in a semiconductor device production management system including a plurality of steppers to be set with stepper correction values for eliminating a shift amount between patterns being stacked on a semiconductor device and an overlay checking device for detecting said shift amount between said patterns and forming overlay check correction values for eliminating said detected shift amount, and for forming said stepper correction values being set by said production management system in said steppers, said method including:
The alignment correction method in accordance with claim 2, wherein said step (b-1) includes:
A semiconductor device production system for producing a semiconductor device having stacked patterns, said stacked patterns being aligned, said system comprising:
Dependencies are inferred from the claim text.