Formation of low resistance, ultra shallow LDD junctions employing a sub-surface, non-amorphous implant

A method of manufacturing a semiconductor device, the method comprising:

• ion implanting Si or Ge to form a surface amorphous region extending from and below a major surface of a semiconductor substrate, the amorphous region having a peak impurity concentration at a first depth below the major substrate surface;
• ion implanting B or BF.sub.2 to form a dopant impurity region a major portion of which is within the amorphous region, the dopant impurity region having a peak impurity concentration at a second depth below the major substrate surface and generating an interstitial-rich region;
• ion implanting Si or Ge to form a sub-surface, non-amorphous impurity region extending below, but not extending from, the major surface of a semiconductor substrate, wherein the non-amorphous impurity region has a peak impurity concentration at a third depth below the major substrate surface greater than the first and second depths and generate a vacancy-rich region substantially overlapping the interstitial-rich region generated when forming the impurity dopant region;
• and
• activation annealing to form lightly doped source/drain regions extending below the major surface of the semiconductor substrate and having a junction depth of about 400 .ANG. to about 700 .ANG., wherein the amorphous region reduces channeling of B or BF.sub.2 and the sub-surface, non-amorphous impurity region reduces transient enhanced diffusion of B or BF.sub.2.