Communications interface adapter for a computer system including posting of system interrupt status
AssigneeAdaptec, Inc.
InventorsStillman F. Gates, Jamileh Davoudi
Life of this patent
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AssigneeAdaptec, Inc.
InventorsStillman F. Gates, Jamileh Davoudi
Estimating the term…
To facilitate access of interrupt status information, interrupt posting status. POST.sub.-- STAT registers are readable by a host driver routine to quickly supply information relating to a functional block which has given rise to an interrupt status condition. The interrupt posting status POST.sub.-- STAT registers contain a summary of interrupt status information. The host driver may then read the interrupt posting status POST.sub.-- STAT register corresponding to the functional block to further investigate the cause of the interrupt status. System memory includes a mirror storage of the interrupt posting status POST.sub.-- STAT registers that is transferred to the mirror storage by a direct memory access (DMA) operation. Values in the system mirror storage are updated automatically when a change occurs in a value within the interrupt posting status POST.sub.-- STAT registers. A host system software driver accesses the interrupt posting status POST.sub.-- STAT registers via a bus access operation, changes a bit in a POST.sub.-- STAT register, and monitors the result of the access and bit change in the mirror of the POST.sub.-- STAT register in the system memory without a further bus read access. Advantageously, multiple accesses through the bus to verify when the written value status is correct is eliminated.
A bus interface apparatus comprising:
A bus interface apparatus comprising:
A bus interface apparatus comprising:
A bus interface apparatus comprising:
A method of operating a bus interface for interfacing a host system to a bus, the bus interface including a data buffer, the host system including a host driver, the method comprising:
Dependencies are inferred from the claim text.