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US 6,084,537 AGranted
Return-to-zero transmitter
AssigneeIntel Corporation
InventorsSteven P. Hardy, James T. Doyle
Life of this patent
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Abstract
A return-to-zero transmitter includes a one shot circuit, an output circuitry and a timing generator. The one shot circuit is constructed to receive a signal that is indicative of a digital bit and generate an output signal that is indicative of positive and negative edges of the bit. The timing generator receives the output signal of the one shot circuit and causes the output circuitry to generate return-to-zero pulses in response to this signal.
Claims19
A return-to-zero transmitter comprising:
- a one shot circuit to receive a first signal indicative of at least one digital bit and generate a second signal indicative of positive and negative edges of the bit;
- output circuitry;
- and
- a timing generator to receive the second signal and, in response to the second signal, cause the output circuitry to generate return-to-zero pulses.
1 more element
A method comprising:
- receiving a first signal indicative of at least one digital bit;
- detecting an edge of the bit in response to the first signal;
- in response to the act of detecting, altering an amount of charge in a charge storage element;
- during the act of altering, generating a first portion of a return-to-zero pulse;
- and
- using the charge storage element to generate a second portion of the return-to-zero pulse.
3 more elements
Dependencies are inferred from the claim text.